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Tadahiko Sugibayashi

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

2

Active years

2012–2020

Best venue rank

C

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2020FPLA 171k-LUT Nonvolatile FPGA using Cu Atom-Switch Technology in 28nm CMOS.Ryusuke Nebashi, Naoki Banno, Makoto Miyamura, Xu Bai, Kazunori Funahashi, Koichiro Okamoto, Noriyuki Iguchi, Hideaki Numata, Tadahiko Sugibayashi, Toshitsugu Sakamoto, Munehiro Tada
2016FPLA highly-dense mixed grained reconfigurable architecture with overlay crossbar interconnect using via-switch.Junshi Hotate, Takashi Kishimoto, Toshiki Higashi, Hiroyuki Ochi, Ryutaro Doi, Munehiro Tada, Tadahiko Sugibayashi, Kazutoshi Wakabayashi, Hidetoshi Onodera, Yukio Mitsuyama, Masanori Hashimoto
2014ISCASA delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing.Ryusuke Nebashi, Noboru Sakimura, Hiroaki Honjo, Ayuka Morioka, Yukihide Tsuji, Kunihiko Ishihara, Keiichi Tokutome, Sadahiko Miura, Shunsuke Fukami, Keizo Kinoshita, Takahiro Hanyu, Tetsuo Endoh, Naoki Kasai, Hideo Ohno, Tadahiko Sugibayashi
2013ISCASMTJ/MOS-hybrid logic-circuit design flow for nonvolatile logic-in-memory LSI.Masanori Natsui, Takahiro Hanyu, Noboru Sakimura, Tadahiko Sugibayashi
2012ISCASHigh-speed simulator including accurate MTJ models for spintronics integrated circuit design.Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Hiroaki Honjo, Tadahiko Sugibayashi, Hiroki Koike, Takashi Ohsawa, Shunsuke Fukami, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh