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Tadao Yamanaka

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

2

Venues

2

Active years

2008–2008

Best venue rank

A*

Where they publish

Papers

2 indexed papers, newest first.

YearVenueTitleAuthors
2008DACPhase-adjustable error detection flip-flops with 2-stage hold driven optimization and slack based grouping scheme for dynamic voltage scaling.Masanori Kurimoto, Hiroaki Suzuki, Rei Akiyama, Tadao Yamanaka, Haruyuki Ohkuma, Hidehiro Takata, Hirofumi Shinohara
2008ISLPEDPost-silicon programmed body-biasing platform suppressing device variability in 45 nm CMOS technology.Hiroaki Suzuki, Masanori Kurimoto, Tadao Yamanaka, Hidehiro Takata, Hiroshi Makino, Hirofumi Shinohara