| 2014 | ISCAS | A single-chip 600-fps real-time action recognition system employing a hardware friendly algorithm. | Zuoxun Hou, Hongbo Zhu, Nanning Zheng, Tadashi Shibata |
| 2013 | ISCAS | An MTJ-based nonvolatile associative memory architecture with intelligent power-saving scheme for high-speed low-power recognition applications. | Yitao Ma, Tadashi Shibata, Tetsuo Endoh |
| 2013 | ISCAS | A VLSI DBSCAN processor composed as an array of micro agents having self-growing interconnects. | Atsushi Shimada, Hongbo Zhu, Tadashi Shibata |
| 2013 | ISCAS | A multiple-candidate-regeneration-based object tracking system with enhanced learning capability by nearest neighbor classifier. | Pushe Zhao, Hongbo Zhu, Tadashi Shibata |
| 2012 | ICAISC | A Hierarchical Action Recognition System Applying Fisher Discrimination Dictionary Learning via Sparse Representation. | Ruihan Bao, Tadashi Shibata |
| 2012 | ICAISC | Real-Time On-Line-Learning Support Vector Machine Based on a Fully-Parallel Analog VLSI Processor. | Renyuan Zhang, Tadashi Shibata |
| 2012 | ICAISC | Real-Time Object Tracking Algorithm Employing On-Line Support Vector Machine and Multiple Candidate Regeneration. | Pushe Zhao, Renyuan Zhang, Tadashi Shibata |
| 2012 | ICASSP | Scene image recognition based on the sequence of local image vectors represented by oriented edges. | Shigetaka Morikawa, Tadashi Shibata |
| 2012 | ISCAS | Self-adaptive quasi-Gaussian circuits for analog on-chip-trainable multi-class classifiers. | Wenjun Xia, Tadashi Shibata |
| 2012 | ISCAS | A real-time motion-feature-extraction image processor employing digital-pixel-sensor-based parallel architecture. | Hongbo Zhu, Tadashi Shibata |
| 2011 | IJCCI | Critical Boundary Vector Concept in Nearest Neighbor Classifiers using k-Means Centers for Efficient Template Reduction. | Wenjun Xia, Tadashi Shibata |
| 2010 | ISCAS | A self-learning multiple-class classifier using multi-dimensional quasi-Gaussian analog circuits. | Zhuoli Sun, Kyunghee Kang, Tadashi Shibata |
| 2010 | ISCAS | A row-parallel cyclic-line-access edge detection CMOS image sensor employing global thresholding operation. | Norihiro Takahashi, Tadashi Shibata |
| 2010 | ISCAS | Directional-edge-based object tracking employing on-line learning and regeneration of multiple candidate locations. | Hongbo Zhu, Pushe Zhao, Tadashi Shibata |
| 2009 | ICANN | A Non-subtraction Configuration of Self-similitude Architecture for Multiple-Resolution Edge-Filtering CMOS Image Sensor. | Norihiro Takahashi, Tadashi Shibata |
| 2009 | ICIP | Normalized scoring of Hidden Markov Models by on-line learning and its application to gesture-sequence perception. | Mio Nishiyama, Tadashi Shibata |
| 2009 | ISCAS | A Single-motion-vector/Cycle-generation Optical Flow Processor Employing Directional-edge Histogram Matching. | Kazuhide Fujita, Kiyoto Ito, Tadashi Shibata |
| 2009 | ISCAS | Block-matching-based CMOS Optical Flow Sensor using Only-nearest-neighbor Computation. | Yudai Fukuoka, Tadashi Shibata |
| 2009 | ISCAS | An On-chip-trainable Gaussian-kernel Analog Support Vector Machine. | Kyunghee Kang, Tadashi Shibata |
| 2009 | ISCAS | A Real-time Image Feature Vector Generator Employing Functional Cache Memory for Edge Flags. | Takuki Nakagawa, Tadashi Shibata |
| 2008 | ICASSP | Blind image compression history determination using dynamic thresholding. | Robert Grou-Szabo, Tadashi Shibata |
| 2008 | ISCAS | Spatiotemporal projection of motion field sequence for generating feature vectors in gesture perception. | Hitoshi Hayakawa, Tadashi Shibata |
| 2008 | ISCAS | An analog self-similitude edge-filtering processor for multiple-resolution image perception. | Norihiro Takahashi, Kazuhide Fujita, Tadashi Shibata |
| 2006 | ICASSP | A Vlsi-Implementation-Friendly EGO-Motion Detection Algorithm Based on Edge-Histogram Matching. | Jia Hao, Tadashi Shibata |
| 2006 | ISCAS | A time-domain gradient-detection architecture for VLSI analog motion sensors. | Kiyoto Ito, Tadashi Shibata |
| 2006 | ISCAS | Power-balanced reconfigurable floating-gate-MOS logic circuit for tamper resistant VLSI. | Benjamas Tongprasit, Tadashi Shibata |
| 2005 | ISCAS | A low-power switched-current CDMA matched filter employing MOS-linear matching cell and output A/D converter. | Tomoyuki Nakayama, Toshihiko Yamasaki, Tadashi Shibata |
| 2005 | ISCAS | A computational digital-pixel-sensor VLSI featuring block-readout architecture for pixel-parallel rank-order filtering. | Benjamas Tongprasit, Kiyoto Ito, Tadashi Shibata |
| 2004 | ICASSP | Multiple-clue face detection algorithm using edge-based feature vectors. | Yasufumi Suzuki, Tadashi Shibata |
| 2004 | ISCAS | Quasi-parallel multi-path detection architecture using floating-gate-MOS-based CDMA matched filters. | Tomoyuki Nakayama, Toshihiko Yamasaki, Tadashi Shibata |
| 2004 | ISCAS | A bump-circuit-based motion detector using projected-activity histograms. | Masayuki Umejima, Toshihiko Yamasaki, Tadashi Shibata |
| 2004 | ISCAS | A real-time VLSI median filter employing two-dimensional bit-propagating architecture. | Hideo Yamasaki, Tadashi Shibata |
| 2003 | ICASSP | Robust cephalometric landmark identification using support vector machines. | Shantanu Chakrabartty, Masakazu Yagi, Tadashi Shibata, Gert Cauwenberghs |
| 2003 | ICASSP | Speaker and text independent language identification using predictive error histogram vectors. | Qian-Rong Gu, Tadashi Shibata |
| 2002 | ICASSP | A human-perception-like image recognition system based on PAP vector representation with multi resolution concept. | Masakazu Yagi, Tadashi Shibata |
| 2002 | ISCAS | A motion-based analog VLSI saliency detector using quasi-two-dimensional hardware algorithm. | Hiroe Kimura, Tadashi Shibata |
| 2002 | ISCAS | A zone-programmed EEPROM with real-time write monitoring for analog data storage. | Keng Hoong Wee, T. Yonezawa, Toshiyuki Nozawa, Tadashi Shibata, Tadahiro Ohmi |
| 2002 | ISCAS | An associative-processor-based mixed signal system for robust grayscale image recognition. | Masakazu Yagi, Tadashi Shibata |
| 2002 | ISCAS | Low-power CDMA analog matched filters based on floating-gate technology. | Toshihiko Yamasaki, Teruyasu Taguchi, Tadashi Shibata |
| 2001 | ISCAS | High-precision analog EEPROM with real-time write monitoring. | Keng Hoong Wee, Toshiyuki Nozawa, Takemi Yonezawa, Yuichiro Yamashita, Tadashi Shibata, Tadahiro Ohmi |
| 2001 | ISCAS | An analog similarity evaluation circuit featuring variable functional forms. | Toshihiko Yamasaki, Tadashi Shibata |
| 2001 | ISCAS | A fast self-convergent flash-memory programming scheme for MV and analog data storage. | Toshihiko Yamasaki, Atsushi Suzuki, Daisuke Kobayashi, Tadashi Shibata |
| 1999 | ISCAS | A neuron-MOS parallel associator for high-speed CDMA matched filter. | Atsuhiko Okada, Tadashi Shibata |
| 1998 | KES | Neuron-MOS continuous-time winner-take-all circuit for intelligent data processing. | Tatsuo Morimoto, Tadashi Shibata, Tadahiro Ohmi |
| 1998 | KES | Right brain computing hardware: a psychological brain model on silicon. | Tadashi Shibata |