Taeho Lim
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2018–2020
Best venue rank
A
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2020 | DATE | Analysis and Solution of CNN Accuracy Reduction over Channel Loop Tiling. | Yesung Kang, Yoonho Park, Sunghoon Kim, Eunji Kwon, Taeho Lim, Sangyun Oh, Mingyu Woo, Seokhyeong Kang |
| 2018 | ASPDAC | An optimal gate design for the synthesis of ternary logic circuits. | Sunmean Kim, Taeho Lim, Seokhyeong Kang |