Takefumi Yoshikawa
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
1
Active years
2013–2026
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ISCAS | A Digitally Controlled Delay Line with Delay Calibration in Phase-Interpolator. | Arimu Kojima, Kenshin Sakaguchi, Shinya Nagasaki, Takefumi Yoshikawa |
| 2025 | ISCAS | An Expandable Digital Delay Line using Phase Interpolator with Duty Cycle Correction Capability. | Shinya Nagasaki, Ryo Kishida, Takefumi Yoshikawa |
| 2024 | ISCAS | A Fractional-N PLL for Multi-phase Clock Generation with Loop Bandwidth Enhancement. | Reo Nagasue, Isamu Mizuno, Ryo Kishida, Tatsuya Iwata, Takefumi Yoshikawa |
| 2013 | ISCAS | Design of self-biased fully differential receiver and crosstalk cancellation for capacitive coupled vertical interconnects in 3DICs. | Myat Thu Linn Aung, Eric Teck Heng Lim, Takefumi Yoshikawa, Tony Tae-Hyoung Kim |