Tatsuya Kamimura
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2014–2014
Best venue rank
B
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2014 | ASPDAC | A 950μW 5.5-GHz low voltage PLL with digitally-calibrated ILFD and linearized varactor. | Sho Ikeda, Tatsuya Kamimura, Sang-yeop Lee, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu |