Te-Hsuan Chen
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
4
Active years
2009–2015
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | DAC | Equivalence among stochastic logic circuits and its application. | Te-Hsuan Chen, John P. Hayes |
| 2014 | ICCD | Analyzing and controlling accuracy in stochastic circuits. | Te-Hsuan Chen, John P. Hayes |
| 2013 | DDECS | Design of stochastic Viterbi decoders for convolutional codes. | Te-Hsuan Chen, John P. Hayes |
| 2009 | VTS | An Adaptive-Rate Error Correction Scheme for NAND Flash Memory. | Te-Hsuan Chen, Yu-Ying Hsiao, Yu-Tsao Hsing, Cheng-Wen Wu |