Teruo Tanimoto
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
9
Venues
7
Active years
2014–2025
Best venue rank
A*
Where they publish
Papers
9 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | HPCA | LSQCA: Resource-Efficient Load/Store Architecture for Limited-Scale Fault-Tolerant Quantum Computing. | Takumi Kobori, Yasunari Suzuki, Yosuke Ueno, Teruo Tanimoto, Synge Todo, Yuuki Tokunaga |
| 2025 | QCE | Power Reduction of Sfq Readout Circuit for Superconducting Quantum Computers. | Masumi Kanda, Yuki Matsumoto, Teruo Tanimoto, Masamitsu Tanaka, Takatsugu Ono |
| 2024 | QCE | Low-Power Half-Flux-Quantum based Counter Circuits for Cryogenic Quantum Computers. | Yuki Matsumoto, Teruo Tanimoto, Masamitsu Tanaka, Takatsugu Ono |
| 2023 | ASPDAC | WIT-Greedy: Hardware System Design of Weighted ITerative Greedy Decoder for Surface Code. | Wang Liao, Yasunari Suzuki, Teruo Tanimoto, Yosuke Ueno, Yuuki Tokunaga |
| 2022 | ISCA | XQsim: modeling cross-technology control processors for 10+K qubit quantum computers. | Ilkwon Byun, Junpyo Kim, Dongmoon Min, Ikki Nagaoka, Kosuke Fukumitsu, Iori Ishikawa, Teruo Tanimoto, Masamitsu Tanaka, Koji Inoue, Jangwoo Kim |
| 2022 | ISCAS | Design of Variable Bit-Width Arithmetic Unit Using Single Flux Quantum Device. | Iori Ishikawa, Ikki Nagaoka, Ryota Kashima, Koki Ishida, Kosuke Fukumitsu, Keitaro Oka, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Akira Fujimaki, Koji Inoue |
| 2022 | MICRO | Q3DE: A fault-tolerant quantum computer architecture for multi-bit burst errors by cosmic rays. | Yasunari Suzuki, Takanori Sugiyama, Tomochika Arai, Wang Liao, Koji Inoue, Teruo Tanimoto |
| 2020 | MICRO | SuperNPU: An Extremely Fast Neural Processing Unit Using Superconducting Logic Devices. | Koki Ishida, Ilkwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, Koji Inoue |
| 2014 | ICS | Hardware-assisted scalable flow control of shared receive queue. | Teruo Tanimoto, Takatsugu Ono, Kohta Nakashima, Takashi Miyoshi |