Tetsuya Iida
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
1994–2000
Best venue rank
C
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2000 | ISCAS | A straightforward design of mismatch-shaped multi-bit ΔΣ D/A systems. | Zdzislaw Czarnul, K. Oda, Tetsuya Iida |
| 1997 | ASPDAC | A current-mode, 3 V, 20 MHz, 9-bit equivalent CMOS sample-and-hold circuit. | Yasuhiro Sugimoto, Tetsuya Iida |
| 1994 | ISCAS | Principles of nonlinearity Cancellation in Linear MOS Systems using MRC Circuits. | Zdzislaw Czarnul, Shigetaka Takagi, Nobuo Fujii, Tetsuya Iida, Takeshi Yanagisawa |