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Thierry Taris

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

6

Venues

3

Active years

2006–2024

Best venue rank

C

Where they publish

Papers

6 indexed papers, newest first.

YearVenueTitleAuthors
2024ISCASA Comprehensive Output Conductance Model Valid in All Regions of Inversion.Christian C. Enz, Hung-Chi Han, Corentin Dlignac, Thierry Taris
2023ISCASAn Area Efficient Built-in Phase Testing Equipment for Phased Array Front-End ICs.Adam Waks, Olivier Crand, Olivier Tesson, Thierry Taris, Jean-Baptiste Bgueret
2020ISCASSubmission for CAS Transactions Papers: Design Methodology Based on the Inversion Coefficient and its Application to Inductorless LNA Implementations.Gabrielle Guitton, Marcelo de Souza, Andr Augusto Mariano, Thierry Taris
2017ISLPEDA tunable Ultra Low Power inductorless Low Noise Amplifier exploiting body biasing of 28 nm FDSOI technology.Jennifer Zaini, Frdric Hameau, Thierry Taris, Dominique Morche, Patrick Audebert, Eric Mercier
2011ISCASA new frequency synthesizers stabilization method based on a mixed Phase Locked Loop and Delay Locked Loop architecture.P. O. Lucas de Peslouan, Cdric Majek, Thierry Taris, Yann Deval, Didier Belot, Jean-Baptiste Bgueret
2006ETSA Robust 130nm-CMOS Built-In Current Sensor Dedicated to RF Applications.Mikal Cimino, Herv Lapuyade, M. De Matos, Thierry Taris, Yann Deval, Jean-Baptiste Bgueret