Thomas M. Niermann
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
2
Active years
1988–1994
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1994 | DAC | Sequential Circuit Test Generation in a Genetic Algorithm Framework. | Elizabeth M. Rudnick, Janak H. Patel, Gary S. Greenstein, Thomas M. Niermann |
| 1991 | ICCAD | Methods for Reducing Events in Sequential Circuit Fault Simulation. | Elizabeth M. Rudnick, Thomas M. Niermann, Janak H. Patel |
| 1990 | DAC | Proofs: A Fast, Memory Efficient Sequential Circuit Fault Simulator. | Thomas M. Niermann, Wu-Tung Cheng, Janak H. Patel |
| 1988 | ICCAD | Compaction of ATPG-generated test sequences for sequential circuits. | Rabindra K. Roy, Thomas M. Niermann, Janak H. Patel, Jacob A. Abraham, Resve A. Saleh |