Tiago Reimann
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
2010–2015
Best venue rank
B
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | ASPDAC | Gate sizing and threshold voltage assignment for high performance microprocessor designs. | Tiago Reimann, Cliff C. N. Sze, Ricardo Reis |
| 2013 | ISCAS | Simultaneous gate sizing and Vt assignment using Fanin/Fanout ratio and Simulated Annealing. | Tiago Reimann, Gracieli Posser, Guilherme Flach, Marcelo O. Johann, Ricardo Reis |
| 2010 | ICCD | The Fidelity Property of the Elmore Delay Model in actual comparison of routing algorithms. | Glauco Borges Valim dos Santos, Tiago Reimann, Marcelo O. Johann, Ricardo Reis |