Tianci Cai
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
1
Active years
2025–2026
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ISCAS | A Hybrid RRAM-FeRAM Computing-in-Memory Architecture with Adaptive Quantization Scheme for Edge AI Devices. | Honghu Yang, Runru Yu, Tianci Cai, Jianguo Yang |
| 2025 | ISCAS | SRIF: Energy- and Area-Efficient Soft Reset Integrate-and-Fire Neuron for High-Accuracy Spiking Neural Network. | Tianci Cai, Qiqiao Wu, Yixuan Liu, Yue Cao, Yu Jiang, Keji Zhou, Jianguo Yang |
| 2025 | ISCAS | A Refresh-Reduction Digital eDRAM CIM Macro using Asymmetric Error Tolerance Scheme. | Yue Cao, Yuanyuan Han, Keji Zhou, Chengshuo Yu, Tianci Cai, Jianguo Yang |
| 2025 | ISCAS | A High Performance Dual-Wordline RRAM Macro with Replica Bitline Delay Control Circuit. | Honghu Yang, Yongkang Han, Tianci Cai, Chengshuo Yu, Keji Zhou, Jianguo Yang |