| 2025 | CIKM | PromptTSS: A Prompting-Based Approach for Interactive Multi-Granularity Time Series Segmentation. | Ching Chang, Ming-Chih Lo, Wen-Chih Peng, Tien-Fu Chen |
| 2024 | ICDE | TimeDRL: Disentangled Representation Learning for Multivariate Time-Series. | Ching Chang, Chiao-Tung Chan, Wei-Yao Wang, Wen-Chih Peng, Tien-Fu Chen |
| 2015 | DAC | Energy-efficient non-volatile TCAM search engine design using priority-decision in memory technology for DPI. | Hsiang-Jen Tsai, Keng-Hao Yang, Yin-Chi Peng, Chien-Chen Lin, Ya-Han Tsao, Meng-Fan Chang, Tien-Fu Chen |
| 2014 | DAC | DAPs: Dynamic Adjustment and Partial Sampling for Multithreaded/Multicore Simulation. | Chien-Chih Chen, Yin-Chi Peng, Cheng-Fen Chen, Wei-Shan Wu, Qinghao Min, Pen-Chung Yew, Weihua Zhang, Tien-Fu Chen |
| 2014 | DAC | Leveraging Data Lifetime for Energy-Aware Last Level Non-Volatile SRAM Caches using Redundant Store Elimination. | Hsiang-Jen Tsai, Chien-Chih Chen, Keng-Hao Yang, Ting-Chin Yang, Li-Yue Huang, Ching-Hao Chuang, Meng-Fan Chang, Tien-Fu Chen |
| 2010 | DATE | RunAssert: A non-intrusive run-time assertion for parallel programs debugging. | Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen, Tay-Jyi Lin |
| 2009 | DAC | No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips. | Shu-Hsuan Chou, Chien-Chih Chen, Chi-Neng Wen, Yi-Chao Chan, Tien-Fu Chen, Chao-Ching Wang, Jinn-Shyan Wang |
| 2009 | DAC | NUDA: a non-uniform debugging architecture and non-intrusive race detection for many-core. | Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen, Alan Peisheng Su |
| 2007 | DAC | An Embedded Coherent-Multithreading Multimedia Processor and Its Programming Model. | Jui-Chin Chu, Wei-Chun Ku, Shu-Hsuan Chou, Tien-Fu Chen, Jiun-In Guo |
| 2006 | DAC | Evaluation and design trade-offs between circuit-switched and packet-switched NOCs for application-specific SOCs. | Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen |
| 2006 | ISCAS | Design of customized functional units for the VLIW-based multi-threading processor core targeted at multimedia applications. | Jui-Chin Chu, Chih-Wen Huang, He-Chun Chen, Keng-Po Lu, Ming-Shuan Lee, Jiun-In Guo, Tien-Fu Chen |
| 2006 | ISCAS | On a design of crossroad switches for low-power on-chip communication architectures. | Jih-Sheng Shen, Kuei-Chung Chang, Tien-Fu Chen |
| 2005 | ISLPED | A low-power crossroad switch architecture and its core placement for network-on-chip. | Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen |
| 2005 | RTCSA | Development of Architecture and Software Technologies in High-Performance Low-Power SoC Design. | Chih-wen Hsueh, Tien-Fu Chen, Rong-Guey Chang, Shi-Wu Lo |
| 2004 | ISCAS | A power-aware IP core design for the variable-length DCT/IDCT targeting at MPEG4 shape-adaptive transforms. | Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh, Tien-Fu Chen |
| 2004 | ISCAS | Unified bus encoding by stream reconstruction with variable strides. | Tien-Fu Chen, Tsung-Ming Hsieh, Chun-Li Wei |
| 2004 | ISCAS | A power-aware IP core generator for the one-dimensional discrete Fourier transform. | Chih-Da Chien, Chien-Chang Lin, Jiun-In Guo, Tien-Fu Chen |
| 2004 | ISCAS | A parameterized power-aware IP core generator for the 2-D 88 DCT/IDCT. | Rei-Chin Ju, Jia-Wei Chen, Jiun-In Guo, Tien-Fu Chen |
| 2003 | IKE | A Tree-Based inverted File for Fast Ranked-Document Retrieval. | Wann-Yun Shieh, Tien-Fu Chen, Chung-Ping Chung |
| 2003 | WWW | A Scalable Locality-Aware Event Dispatching Mechanism for Network Servers. | Hao-Ran Liu, Tien-Fu Chen |
| 2002 | CASES | Dynamic voltage leveling scheduling for real-time embedded systems on low-power variable speed processors. | Jian-Liang Kuo, Tien-Fu Chen |
| 2001 | SC | Compressing inverted files in scalable information systems by binary decision diagram encoding . | Chung-Hung Lai, Tien-Fu Chen |
| 2000 | RTCSA | Dynamic memory management for real-time embedded Java chips. | Chi-Min Lin, Tien-Fu Chen |
| 1998 | HPCA | Supporting Highly-Speculative Execution via Adaptive Branch Trees. | Tien-Fu Chen |
| 1995 | MICRO | An effective programmable prefetch engine for on-chip caches. | Tien-Fu Chen |
| 1994 | ISCA | A Performance Study of Software and Hardware Data Prefetching Schemes. | Tien-Fu Chen, Jean-Loup Baer |
| 1992 | ASPLOS | Reducing Memory Latency via Non-blocking and Prefetching Caches. | Tien-Fu Chen, Jean-Loup Baer |
| 1991 | SC | An effective on-chip preloading scheme to reduce data access penalty. | Jean-Loup Baer, Tien-Fu Chen |