Tomoyuki Yoda
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
1999–2006
Best venue rank
B
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2006 | ASPDAC | Low-power design methodology for module-wise dynamic voltage and frequency scaling with dynamic de-skewing systems. | Takeshi Kitahara, Hiroyuki Hara, Shinichiro Shiratake, Yoshiki Tsukiboshi, Tomoyuki Yoda, Tetsuaki Utsumi, Fumihiro Minami |
| 1999 | ASPDAC | Clock Period Minimization of Semi-Synchronous Circuits by Gate-Level Delay Insertion. | Tomoyuki Yoda, Atsushi Takahashi, Yoji Kajitani |