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Toni Juan

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

6

Active years

1994–2009

Best venue rank

A*

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2009ICCDReusing cached schedules in an out-of-order processor with in-order issue logic.Oscar Palomar, Toni Juan, Juan J. Navarro
2002ISCATarantula: A Vector Extension to the Alpha Architecture.Roger Espasa, Federico Ardanaz, Julio Gago, Roger Gramunt, Isaac Hernandez, Toni Juan, Joel S. Emer, Stephen Felix, P. Geoffrey Lowney, Matthew Mattina, Andr Seznec
2001ISPASSHow to compare the performance of two SMT microarchitectures.Yiannakis Sazeides, Toni Juan
1998ISCADynamic History-length Fitting: A Third Level of Adaptivity for Branch Prediction.Toni Juan, Sanji Sanjeevan, Juan J. Navarro
1998MICRODataflow Analysis of Branch Mispredictions and Its Application to Early Resolution of Branch Outcomes.Alexandre Farcy, Olivier Temam, Roger Espasa, Toni Juan
1997ICSData Caches for Superscalar Processors.Toni Juan, Juan J. Navarro, Olivier Temam
1997ISLPEDReducing TLB power requirements.Toni Juan, Toms Lang, Juan J. Navarro
1996ISCAThe Difference-bit Cache.Toni Juan, Toms Lang, Juan J. Navarro
1996ICSBlock Algorithms for Sparse Matrix Computations on High Performance Workstations.Juan J. Navarro, Elena Garca-Diego, Josep Llus Larriba-Pey, Toni Juan
1994ICSMOB forms: a class of multilevel block algorithms for dense linear algebra operations.Juan J. Navarro, Toni Juan, Toms Lang