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Toyohiko Yoshida

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

6

Venues

3

Active years

1989–2001

Best venue rank

C

Where they publish

Papers

6 indexed papers, newest first.

YearVenueTitleAuthors
2001ICSEvaluation of processor code efficiency for embedded systems.Morgan Hirosuke Miki, Mamoru Sakamoto, Shingo Miyamoto, Yoshinori Takeuchi, Toyohiko Yoshida, Isao Shirakawa
1997ICASSPA dual-issue RISC processor for multimedia signal processing.Hisakazu Sato, Edgar Holmann, Toyohiko Yoshida, Masahito Matsuo, Toru Kengaku
1996ICCDMicroarchitecture Support for Reducing Branch Penalty in a Supercscaler Processor.Mamoru Sakamoto, Toyohiko Yoshida, Yasuhiro Nunomura, Yukihiko Shimazu
1994ICCDA 32-bit Superscalar Microprocessor with 64-Bit Processing and High Bandwidth DRAM Interface.Masahito Matsuo, Hiroyuki Kondo, Yukari Takata, Souichi Kobayashi, Mitsugu Satoh, Toyohiko Yoshida, Yuichi Saito, Jun-ichi Hinata
1990ICCDA strategy for avoiding pipeline interlock delays in a microprocessor.Toyohiko Yoshida, Masahito Matsuo, Tatsuya Ueda, Yuichi Saito
1989ICCDA 32-bit microprocessor with high performance bit-map manipulation instructions.Toru Shimizu, Shunichi Iwata, Yuichi Saito, Toyohiko Yoshida, Masahito Matsuo, Junichi Hinata, Kazunori Saito