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Trevor E. Carlson

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

49

Venues

17

Active years

2009–2026

Best venue rank

A*

Where they publish

Papers

49 indexed papers, newest first.

YearVenueTitleAuthors
2026ASPLOSAnvil: A General-Purpose Timing-Safe Hardware Description Language.Jason Zhijingcheng Yu, Aditya Ranjan Jha, Umang Mathur, Trevor E. Carlson, Prateek Saxena
2026HPCASSBleed: Non-Speculative Side-Channel Attacks via Speculative Store Bypass on Armv9 CPUs.Chang Liu, Hongpei Zheng, Xin Zhang, Dapeng Ju, Dongsheng Wang, Yinqian Zhang, Trevor E. Carlson
2026ISCASSBench: Automated Characterization of Memory Dependence Predictors on Modern CPUs.Chang Liu, Yu Jin, Yuchen Fan, Tianrui Xiao, Lingfeng Yin, Trevor E. Carlson, Shuwen Deng, Dongsheng Wang
2026ISCAHiT: A Unified Sparsity-Adaptive Architecture for High-Throughput Matrix Multiplication.Tingting Xiang, Xiaochen Wang, Miao Yu, Trevor E. Carlson
2026ISCATowards Practical Interrupt Side-Channel Attacks on macOS for Apple Silicon.Xin Zhang, Chang Liu, Jiajun Zou, Yi Yang, Qingni Shen, Zhi Zhang, Trevor E. Carlson
2025ASPLOSMDPeek: Breaking Balanced Branches in SGX with Memory Disambiguation Unit Side Channels.Chang Liu, Shuaihu Feng, Yuan Li, Dongsheng Wang, Wenjian He, Yongqiang Lyu, Trevor E. Carlson
2025CCSSecuring Mixed Rust with Hardware Capabilities.Jason Zhijingcheng Yu, Fangqi Han, Kaustab Choudhury, Trevor E. Carlson, Prateek Saxena
2025DACHoBBy: Hardening Unbalanced Branches against Control Flow Attacks on Intel SGX and AMD SEV.Chang Liu, Shuaihu Feng, Yuan Li, Dongsheng Wang, Trevor E. Carlson
2025DACSSFT: Algorithm and Hardware Co-design for Structured Sparse Fine-Tuning of Large Language Models.Miao Yu, Trevor E. Carlson
2025DACAmpereBleed: Exploiting On-chip Current Sensors for Circuit-Free Attacks on ARM-FPGA SoCs.Xin Zhang, Yi Yang, Jiajun Zou, Qingni Shen, Zhi Zhang, Yansong Gao, Zhonghai Wu, Trevor E. Carlson
2025DACLeakyDSP: Exploiting Digital Signal Processing Blocks to Sense Voltage Fluctuations in FPGAs.Xin Zhang, Jiajun Zou, Yi Yang, Qingni Shen, Zhi Zhang, Yansong Gao, Zhonghai Wu, Trevor E. Carlson
2025ISCACassandra: Efficient Enforcement of Sequential Execution for Cryptographic Programs.Ali Hajiabadi, Trevor E. Carlson
2025ISCAThe Sparsity-Aware LazyGPU Architecture.Changxi Liu, Miao Yu, Yifan Sun, Trevor E. Carlson
2025MICROMulti-Stream Squash Reuse for Control-Independent Processors.Qingxuan Kang, Trevor E. Carlson
2025SIGCOMMPARS: A Layered Hardware Obfuscation Platform for Resilience and Secure Collaborative Multi-Module Designs.Mona Hashemi, Siamak Mohammadi, Trevor E. Carlson
2025SACMATCaplification: Bridging Capability-Aware and Capability-Oblivious Software.Jason Zhijingcheng Yu, Mingkai Li, Aditya Badole, Trevor E. Carlson, Michael Swift, Prateek Saxena
2024DACLevioso: Efficient Compiler-Informed Secure Speculation.Ali Hajiabadi, Archit Agarwal, Andreas Diavastos, Trevor E. Carlson
2024DACConjuring: Leaking Control Flow via Speculative Fetch Attacks.Ali Hajiabadi, Trevor E. Carlson
2024DATEPrime+Reset: Introducing A Novel Cross-World Covert-Channel Through Comprehensive Security Analysis on ARM TrustZone.Yun Chen, Arash Pashrashid, Yongzheng Wu, Trevor E. Carlson
2024HPCAGADGETSPINNER: A New Transient Execution Primitive Using the Loop Stream Detector.Yun Chen, Ali Hajiabadi, Trevor E. Carlson
2024HPCAPREFETCHX: Cross-Core Cache-Agnostic Prefetcher-based Side-Channel Attacks.Yun Chen, Ali Hajiabadi, Lingfeng Pei, Trevor E. Carlson
2024ISCASEfficient Detection and Mitigation Schemes for Speculative Side Channels.Arash Pashrashid, Ali Hajiabadi, Trevor E. Carlson
2023ASPLOSAfterImage: Leaking Control Flow Data and Tracking Load Operations via the Hardware Prefetcher.Yun Chen, Lingfeng Pei, Trevor E. Carlson
2023ICCADHidFix: Efficient Mitigation of Cache-Based Spectre Attacks Through Hidden Rollbacks.Arash Pashrashid, Ali Hajiabadi, Trevor E. Carlson
2023MICROPhoton: A Fine-grained Sampled Simulation Methodology for GPU Workloads.Changxi Liu, Yifan Sun, Trevor E. Carlson
2022DATEGraphWave: A Highly-Parallel Compute-at-Memory Graph Processing Accelerator.Jinho Lee, Burin Amornpaisannon, Tulika Mitra, Trevor E. Carlson
2022HPCALoopPoint: Checkpoint-driven Sampled Simulation for Multi-threaded Applications.Alen Sabu, Harish Patil, Wim Heirman, Trevor E. Carlson
2022ICCADFast, Robust and Accurate Detection of Cache-Based Spectre Attack Phases.Arash Pashrashid, Ali Hajiabadi, Trevor E. Carlson
2021ASPLOSNOREBA: a compiler-informed non-speculative out-of-order commit processor.Ali Hajiabadi, Andreas Diavastos, Trevor E. Carlson
2021CGOELFies: Executable Region Checkpoints for Performance Analysis and Simulation.Harish Patil, Alexander Isaev, Wim Heirman, Alen Sabu, Ali Hajiabadi, Trevor E. Carlson
2021DACUltra-Fast CGRA Scheduling to Enable Run Time, Programmable CGRAs.Jinho Lee, Trevor E. Carlson
2020ICCADLaser Attack Benchmark Suite.Burin Amornpaisannon, Andreas Diavastos, Li-Shiuan Peh, Trevor E. Carlson
2019MICRODirected Statistical Warming through Time Traveling.Nikos Nikoleris, Lieven Eeckhout, Erik Hagersten, Trevor E. Carlson
2018ISPASSBehind the Scenes: Memory Analysis of Graphical Workloads on Tile-Based GPUs.Germn Ceballos, Andreas Sembrant, Trevor E. Carlson, David Black-Schaffer
2018PLDISWOOP: software-hardware co-design for non-speculative, execute-ahead, in-order cores.Kim-Anh Tran, Alexandra Jimborean, Trevor E. Carlson, Konstantinos Koukos, Magnus Sjlander, Stefanos Kaxiras
2017CGOClairvoyance: look-ahead compile-time scheduling.Kim-Anh Tran, Trevor E. Carlson, Konstantinos Koukos, Magnus Sjlander, Vasileios Spiliopoulos, Stefanos Kaxiras, Alexandra Jimborean
2017ISCANon-Speculative Load-Load Reordering in TSO.Alberto Ros, Trevor E. Carlson, Mehdi Alipour, Stefanos Kaxiras
2017ISPASSA taxonomy of out-of-order instruction commit.Mehdi Alipour, Trevor E. Carlson, Stefanos Kaxiras
2016ISPASSCoolSim: Eliminating traditional cache warming with fast, virtualized profiling.Nikos Nikoleris, Andreas Sandberg, Erik Hagersten, Trevor E. Carlson
2015ISCAThe load slice core microarchitecture.Trevor E. Carlson, Wim Heirman, Osman Allam, Stefanos Kaxiras, Lieven Eeckhout
2015ISPASSMicro-architecture independent analytical processor performance and power modeling.Sam Van den Steen, Sander De Pestel, Moncef Mechri, Stijn Eyerman, Trevor E. Carlson, David Black-Schaffer, Erik Hagersten, Lieven Eeckhout
2015MICROLong term parking (LTP): criticality-aware resource allocation in OOO processors.Andreas Sembrant, Trevor E. Carlson, Erik Hagersten, David Black-Schaffer, Arthur Perais, Andr Seznec, Pierre Michaud
2014HPCAUndersubscribed threading on clustered cache architectures.Wim Heirman, Trevor E. Carlson, Kenzo Van Craeynest, Ibrahim Hur, Aamer Jaleel, Lieven Eeckhout
2014ICSAutomatic SMT threading for OpenMP applications on the Intel Xeon Phi co-processor.Wim Heirman, Trevor E. Carlson, Kenzo Van Craeynest, Ibrahim Hur, Aamer Jaleel, Lieven Eeckhout
2014ISPASSBarrierPoint: Sampled simulation of multi-threaded applications.Trevor E. Carlson, Wim Heirman, Kenzo Van Craeynest, Lieven Eeckhout
2013ISPASSSampled simulation of multi-threaded applications.Trevor E. Carlson, Wim Heirman, Lieven Eeckhout
2011EuroParEvaluating Application Vulnerability to Soft Errors in Multi-level Cache Hierarchy.Zhe Ma, Trevor E. Carlson, Wim Heirman, Lieven Eeckhout
2011SCSniper: exploring the level of abstraction for scalable and accurate parallel multi-core simulation.Trevor E. Carlson, Wim Heirman, Lieven Eeckhout
2009DATESystem-level power/performance evaluation of 3D stacked DRAMs for mobile applications.Marco Facchini, Trevor E. Carlson, Anselme Vignon, Martin Palkovic, Francky Catthoor, Wim Dehaene, Luca Benini, Paul Marchal