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Tsai-Wei Chiu

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

1

Venues

1

Active years

2009–2009

Best venue rank

Multiconference

Where they publish

Papers

1 indexed papers, newest first.

YearVenueTitleAuthors
2009ICASSPBandwidth-efficient cache-based motion compensation architecture with DRAM-friendly data access control.Tzu-Der Chuang, Lo-Mei Chang, Tsai-Wei Chiu, Yi-Hau Chen, Liang-Gee Chen