Uwe Meyer-Bse
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
14
Venues
3
Active years
1994–2011
Best venue rank
B
Where they publish
Papers
14 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2011 | FPL | FPGA-Based Acceleration of Block Matching Motion Estimation Techniques. | Diego Gonzlez, Guillermo Botella Juan, Soumak Mokheerje, Uwe Meyer-Bse |
| 2009 | FPL | Enhanced gradient-based motion vector coprocessor. | Guillermo Botella Juan, Antonio Garca Ros, Uwe Meyer-Bse, Manuel Rodrguez, Mara C. Molina, Lus Parrilla Roure |
| 2007 | FPL | Intellectual Property Protection of HDL IP Cores Through Automated Sognature Hosting. | Encarnacin Castillo, Luis Parrilla, Antonio Garca, Uwe Meyer-Bse, Antonio Lloris-Ruz |
| 2006 | FPL | IPP Watermarking Technique for IP Core Protection on FPL Devices. | Encarnacin Castillo, Luis Parrilla, Antonio Garca, Antonio Lloris-Ruz, Uwe Meyer-Bse |
| 2005 | FPL | Efficient Embedded FPL Resource Usage for RNS-based Polyphase DWT Filter Banks. | Antonio Garca, Javier Ramrez, Uwe Meyer-Bse, Encarnacin Castillo, Antonio Lloris-Ruz |
| 2004 | FPL | Area*Time Optimized Hogenauer Channelizer Design Using FPL Devices. | Uwe Meyer-Bse, Suhasini Rao, Javier Ramrez, Antonio Garca |
| 2003 | FPL | Design and Implementation of RNS-Based Adaptive Filters. | Javier Ramrez, Uwe Meyer-Bse, Antonio Garca, Antonio Lloris-Ruz |
| 2002 | FPL | Low Power High Speed Algebraic Integer Frequency Sampling Filters Using FPLDs. | Uwe Meyer-Bse, Javier Ramrez, Antonio Garca |
| 2001 | ICASSP | Design of RNS-based distributed arithmetic DWT filterbanks. | Javier Ramrez, Antonio Garca, Uwe Meyer-Bse, Fred J. Taylor, Pedro G. Fernndez, Antonio Lloris-Ruz |
| 1999 | ISCAS | RNS implementation of FIR filters based on distributed arithmetic using field-programmable logic. | Antonio Garca, Uwe Meyer-Bse, Antonio Lloris-Ruz, Fred J. Taylor |
| 1997 | ICASSP | Design of RNS frequency sampling filter banks. | Uwe Meyer-Bse, Jon Mellott, Fred J. Taylor |
| 1996 | FPL | Coherent Demodulation with FPGAs. | Uwe Meyer-Bse |
| 1996 | FPL | Convolutional Error Decoding with FPGAs. | Uwe Meyer-Bse |
| 1994 | FPL | COordinate Rotation DIgital Computer (CORDIC) Synthesis for FPGA. | Uwe Meyer-Bse, Anke Meyer-Bse, Wolfgang Hilberg |