V. Sachidanand
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
1992–1992
Best venue rank
National
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1992 | VLSID | WCS - A CAD Solution for Worst Case Performance Analysis of Integrated Circuits. | S. Nagaraj, N. Padmini, N. S. Nagaraj, R. Ramesh, V. Sachidanand |