Veerendra S. Devaraddi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2022–2022
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2022 | DSD | An FPGA based Tiled Systolic Array Generator to Accelerate CNNs. | Veerendra S. Devaraddi, Nanditha P. Rao |