Victor A. Ying
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
3
Active years
2017–2023
Best venue rank
A*
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2023 | MICRO | Accelerating RTL Simulation with Hardware-Software Co-Design. | Fares Elsabbagh, Shabnam Sheikhha, Victor A. Ying, Quan M. Nguyen, Joel S. Emer, Daniel Snchez |
| 2021 | ISCA | Taming the Zoo: The Unified GraphIt Compiler Framework for Novel Architectures. | Ajay Brahmakshatriya, Emily Furst, Victor A. Ying, Claire Hsu, Changwan Hong, Max Ruttenberg, Yunming Zhang, Dai Cheol Jung, Dustin Richmond, Michael B. Taylor, Julian Shun, Mark Oskin, Daniel Snchez, Saman P. Amarasinghe |
| 2020 | ISCA | T4: Compiling Sequential Code for Effective Speculative Parallelization in Hardware. | Victor A. Ying, Mark C. Jeffrey, Daniel Snchez |
| 2019 | ISPASS | Timeloop: A Systematic Approach to DNN Accelerator Evaluation. | Angshuman Parashar, Priyanka Raina, Yakun Sophia Shao, Yu-Hsin Chen, Victor A. Ying, Anurag Mukkara, Rangharajan Venkatesan, Brucek Khailany, Stephen W. Keckler, Joel S. Emer |
| 2018 | MICRO | Harmonizing Speculative and Non-Speculative Execution in Architectures for Ordered Parallelism. | Mark C. Jeffrey, Victor A. Ying, Suvinay Subramanian, Hyun Ryong Lee, Joel S. Emer, Daniel Snchez |
| 2017 | ISCA | Fractal: An Execution Model for Fine-Grain Nested Speculative Parallelism. | Suvinay Subramanian, Mark C. Jeffrey, Maleen Abeydeera, Hyun Ryong Lee, Victor A. Ying, Joel S. Emer, Daniel Snchez |