Vidya Sankaranaryanan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2017–2017
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2017 | RSP | Simulation-based circuit-activity estimation for FPGAs containing hard blocks. | Sean Seeley, Vidya Sankaranaryanan, Zack Deveau, Panagiotis Patros, Kenneth B. Kent |