Vikas Mehrotra
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2000–2000
Best venue rank
A*
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2000 | DAC | A methodology for modeling the effects of systematic within-die interconnect and device variation on circuit performance. | Vikas Mehrotra, Shiou Lin Sam, Duane S. Boning, Anantha P. Chandrakasan, Rakesh Vallishayee, Sani R. Nassif |