| 2015 | SBAC-PAD | Optimized Parallel Label Propagation Based Community Detection on the Intel(R) Xeon Phi(TM) Architecture. | Andrei B. Khlopotine, Arun V. Sathanur, Vikram Jandhyala |
| 2014 | SMC | Simulating context-driven activity cascades in online social networks on the google exacycle platform. | Arun V. Sathanur, Miao Sui, Vikram Jandhyala, Michael D. Tyka, Nicole A. Deflaux |
| 2013 | ISI | Capturing signatures of anomalous behavior in online social networks. | Arun V. Sathanur, Vikram Jandhyala, Chuanjia Xing |
| 2013 | ISI | PHYSENSE: Scalable sociological interaction models for influence estimation on online social networks. | Arun V. Sathanur, Vikram Jandhyala, Chuanjia Xing |
| 2012 | DATE | Moore meets maxwell. | Raul Camposano, Dipanjan Gope, Stefano Grivet-Talocia, Vikram Jandhyala |
| 2012 | ICCAD | Design strategies for high-dimensional electromagnetic systems. | Vikram Jandhyala, Arun V. Sathanur |
| 2011 | DAC | Physics-based field-theoretic design automation tools for social networks and web search. | Vikram Jandhyala |
| 2010 | VLSID | Towards Active-Passive Co-synthesis of Multi-gigaHertz Radio Frequency Circuits. | Ritochit Chakraborty, Arun V. Sathanur, Vikram Jandhyala |
| 2009 | ICCAD | Active-passive co-synthesis of multi-GigaHertz radio frequency circuits with broadband parametric macromodels of on-chip passives. | Ritochit Chakraborty, Arun V. Sathanur, Vikram Jandhyala |
| 2008 | ISCAS | Accurate statistical analysis of a differential low noise amplifier using a combined SPICE-field solver approach. | Arun V. Sathanur, Ritochit Chakraborty, Vikram Jandhyala |
| 2007 | ICCAD | Statistical analysis of RF circuits using combined circuit simulator-full wave field solver approach. | Arun V. Sathanur, Ritochit Chakraborty, Vikram Jandhyala |
| 2006 | DAC | A parallel low-rank multilevel matrix compression algorithm for parasitic extraction of electrically large structures. | Chuanyi Yang, Swagato Chakraborty, Dipanjan Gope, Vikram Jandhyala |
| 2005 | DAC | DiMES: multilevel fast direct solver based on multipole expansions for parasitic extraction of massively coupled 3D microelectronic structures. | Dipanjan Gope, Indranil Chowdhury, Vikram Jandhyala |
| 2004 | DAC | A fast parasitic extractor based on low-rank multilevel matrix compression for conductor and dielectric modeling in microelectronics and MEMS. | Dipanjan Gope, Swagato Chakraborty, Vikram Jandhyala |
| 1999 | DAC | Efficient Capacitance Computation for Structures with Non-Uniform Adaptive Surface Meshes. | Vikram Jandhyala, Scott Savage, J. Eric Bracken, Zoltan J. Cendes |