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Viktor wall

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

41

Venues

8

Active years

1993–2021

Best venue rank

C

Where they publish

Papers

41 indexed papers, newest first.

YearVenueTitleAuthors
2021VTCThe Effect of Coupling Memory and Block Length on Spatially Coupled Serially Concatenated Codes.Mojtaba Mahdavi, Muhammad Umar Farooq, Liang Liu, Ove Edfors, Viktor wall, Michael Lentmaier
2019ISCASA VLSI Implementation of Angular-Domain Massive MIMO Detection.Mojtaba Mahdavi, Ove Edfors, Viktor wall, Liang Liu
2019ISCASA Programmable 16-Lane SIMD ASIP for Massive MIMO.Steffen Malkowsky, Hemanth Prabhu, Liang Liu, Ove Edfors, Viktor wall
2017ACSSCBuilding and operating a real-time massive MIMO testbed - lessons learned.Steffen Malkowsky, Liang Liu, Viktor wall, Ove Edfors
2017ISCASA low latency and area efficient FFT processor for massive MIMO systems.Mojtaba Mahdavi, Ove Edfors, Viktor wall, Liang Liu
2017VTCReducing On-Chip Memory for Massive MIMO Baseband Processing Using Channel Compression.Yangxurui Liu, Ove Edfors, Liang Liu, Viktor wall
2015ISCASA 350μW Sign-Bit architecture for multi-parameter estimation during OFDM acquisition in 65nm CMOS.Isael Diaz, Siyu Tan, Yun Miao, Leif R. Wilhelmsson, Ove Edfors, Viktor wall
2014GLOBECOMA flexible 100-antenna testbed for Massive MIMO.Joao Vieira, Steffen Malkowsky, Karl Nieman, Zachary Miers, Nikhil Kundargi, Liang Liu, Ian C. Wong, Viktor wall, Ove Edfors, Fredrik Tufvesson
2014ISCASEnergy efficient SQRD processor for LTE-A using a group-sort update scheme.Chenxin Zhang, Hemanth Prabhu, Liang Liu, Ove Edfors, Viktor wall
2013ISCASHardware acceleration of the robust header compression (RoHC) algorithm.Mohammed Al-Obaidi, Harshavardhan Kittur, Hkan Andersson, Viktor wall
2013ISCASAnalog and digital approaches for an energy efficient low complexity channel decoder.Reza Meraji, S. M. Yasser Sherazi, John B. Anderson, Henrik Sjland, Viktor wall
2013WCNCA highly parallelized MIMO detector for vector-based reconfigurable architectures.Chenxin Zhang, Liang Liu, Yian Wang, Meifang Zhu, Ove Edfors, Viktor wall
2012ISCASMapping channel estimation and MIMO detection in LTE-advanced on a reconfigurable cell array.Chenxin Zhang, Liang Liu, Viktor wall
2011ISCASAn analog (7, 5) convolutional decoder in 65 nm CMOS for low power wireless applications.Reza Meraji, John B. Anderson, Henrik Sjland, Viktor wall
2011ISCASReconfigurable cell array for concurrent support of multiple radio standards by flexible mapping.Chenxin Zhang, Isael Diaz, Per Andersson, Joachim Neves Rodrigues, Viktor wall
2011WCNCAnalysis of a novel low complex SNR estimation technique for OFDM systems.Leif R. Wilhelmsson, Isael Diaz, Thomas Olsson, Viktor wall
2010ISCASA sign-bit auto-correlation architecture for fractional frequency offset estimation in OFDM.Isael Diaz, Leif R. Wilhelmsson, Joachim Neves Rodrigues, Johan Lfgren, Thomas Olsson, Viktor wall
2010VTCPerformance Analysis of Sign-Based Pre-FFT Synchronization in OFDM Systems.Leif R. Wilhelmsson, Isael Diaz, Thomas Olsson, Viktor wall
2009ISCASTransmitter Architecture for Faster-than-Nyquist Signaling Systems.Deepak Dasalukunte, Fredrik Rusek, John B. Anderson, Viktor wall
2008ISCASModeling and exploration of a reconfigurable architecture for digital holographic imaging.Thomas Lenart, Henrik Svensson, Viktor wall
2007ISCASImplementation of a Labeling Algorithm based on Contour Tracing with Feature Extraction.Hugo Hedberg, Fredrik Kristensen, Viktor wall
2007ISCASAccelerating Vector Operations by Utilizing Reconfigurable Coprocessor Architectures.Henrik Svensson, Thomas Lenart, Viktor wall
2006ACCVBackground Segmentation Beyond RGB.Fredrik Kristensen, Peter Nilsson, Viktor wall
2006AVSSReal-Time Video Segmentation with VGA Resolution and Memory Bandwidth Reduction.Hongtu Jiang, Viktor wall, Hkan Ard
2005ISCASA scalable pipelined complex valued matrix inversion architecture.Fredrik Edman, Viktor wall
2005ISCASA low complexity architecture for binary image erosion and dilation using structuring element decomposition.Hugo Hedberg, Fredrik Kristensen, Peter Nilsson, Viktor wall
2005ISCASHardware accelerator design for video segmentation with multi-modal background modelling.Hongtu Jiang, Hkan Ard, Viktor wall
2005ISCASArea and power efficient trellis computational blocks in 0.13m CMOS.Matthias Kamuf, John B. Anderson, Viktor wall
2005ISCASA dual-mode wavelet based R-wave detector using single-VJoachim Neves Rodrigues, Thomas Olsson, Leif Srnmo, Viktor wall
2005ISCASImplementation aspects of a novel speech packet loss concealment method.Henrik Svensson, Viktor wall, Krzysztof Kuchcinski
2005PIMRCArchitectural considerations for rate-flexible trellis processing blocks.Matthias Kamuf, Viktor wall, John B. Anderson
2004ISCASFPGA implementation of controller-datapath pair in custom image processor design.Hongtu Jiang, Viktor wall
2004ISCASA wavelet based R-wave detector for cardiac pacemakers in 0.35 CMOS technology.Joachim Neves Rodrigues, Viktor wall, Leif Srnmo
2003ISCASA configurable divider using digit recurrence.Anders Berkeman, Viktor wall
2003ISCASProviding flexibility in a convolutional encoder.Matthias Kamuf, John B. Anderson, Viktor wall
2003ISCASA 2048 complex point FFT processor using a novel data scaling approach.Thomas Lenart, Viktor wall
2003PIMRCImplementation of a scalable matrix inversion architecture for triangular matrices.Fredrik Edman, Viktor wall
2001ISCASQRS detection for pacemakers in a noisy environment using a time lagged artificial neural network.Joachim Neves Rodrigues, Viktor wall, Leif Srnmo
2000ISCASCo-optimization of FFT and FIR in a delayless acoustic echo canceller implementation.Anders Berkeman, Viktor wall
1998PIMRCHardware implementation aspects of a detector based on successive interference cancellation in a DS/CDMA system.Thomas Olsson, Carl Magnus Jnsson, Viktor wall, Peter Nilsson
1993ISCASA GSM speech coder implemented on a customized processor architecture.Viktor wall, Pietro Andreani, L. Brange, Peter Nilsson, A. Wass, Mats Torkelson