Vineet Agarwal
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
1
Active years
2005–2007
Best venue rank
B
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2007 | ASPDAC | Delay Uncertainty Reduction by Interconnect and Gate Splitting. | Vineet Agarwal, Jin Sun, Alexander V. Mitev, Janet Meiling Wang |
| 2006 | ASPDAC | Yield-area optimizations of digital circuits using non-dominated sorting genetic algorithm (YOGA). | Vineet Agarwal, Janet Meiling Wang |
| 2006 | ASPDAC | A probabilistic analysis of pipelined global interconnect under process variations. | Navneeth Kankani, Vineet Agarwal, Janet Meiling Wang |
| 2005 | ASPDAC | An efficient combinationality check technique for the synthesis of cyclic combinational circuits. | Vineet Agarwal, Navneeth Kankani, Ravishankar Rao, Sarvesh Bhardwaj, Janet Meiling Wang |