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Vineet Sahula

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

7

Venues

1

Active years

2001–2020

Best venue rank

National

Where they publish

Papers

7 indexed papers, newest first.

YearVenueTitleAuthors
2020VLSIDIntensifying Challenge Obfuscation by Cascading FPGA RO-PUFs for Random Number Generation.Arjun Singh Chauhan, Vineet Sahula, A. S. Mandal, Abhigyan Dutta
2019VLSIDNovel Randomized & Biased Placement for FPGA Based Robust Random Number Generator with Enhanced Uniqueness.Arjun Singh Chauhan, Vineet Sahula, Atanendu S. Mandal
2018VLSIDNovel Variability Aware Path Selection for Self-Referencing Based Hardware Trojan Detection.Ramakrishna Vaikuntapu, Lava Bhargava, Vineet Sahula
2016VLSIDAccurate and Efficient Estimation of Dynamic Virtual Ground Voltage in Power Gated Circuits.Lokesh Garg, Vineet Sahula
2012VLSIDPower Aware Hardware Prototyping of Multiclass SVM Classifier Through Reconfiguration.Rajesh A. Patil, Gauri Gupta, Vineet Sahula, Atanendu S. Mandal
2002VLSIDImprovement of ASIC Design Processes.Vineet Sahula, C. P. Ravikumar, D. Nagchoudhuri
2001VLSIDThe Hierarchical Concurrent Flow Graph Approach for Modeling and Analysis of Design Processes.Vineet Sahula, C. P. Ravikumar