Vinod Viswanath
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
4
Active years
2004–2024
Best venue rank
National
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | VLSID | DFT Static Verification using Early RTL Exploration and Debug for Mobile SoC and Edge AI Applications. | Vinod Viswanath, Kanad Chakraborty |
| 2009 | VLSID | Dedicated Rewriting: Automatic Verification of Low Power Transformations in RTL. | Vinod Viswanath, Shobha Vasudevan, Jacob A. Abraham |
| 2007 | VLSID | Efficient Microprocessor Verification using Antecedent Conditioned Slicing. | Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraham |
| 2006 | DATE | Automatic insertion of low power annotations in RTL for pipelined microprocessors. | Vinod Viswanath, Jacob A. Abraham, Warren A. Hunt Jr. |
| 2006 | MEMOCODE | Automatic decomposition for sequential equivalence checking of system level and RTL descriptions. | Shobha Vasudevan, Jacob A. Abraham, Vinod Viswanath, Jiajin Tu |
| 2004 | DSD | Multi-log Processor - Towards Scalable Event-Driven Multiprocessors. | Vinod Viswanath |