| 2015 | ARITH | Minimizing Energy by Achieving Optimal Sparseness in Parallel Adders. | Mustafa Aktan, Dursun Baran, Vojin G. Oklobdzija |
| 2011 | ISCAS | Multiplier structures for low power applications in deep-CMOS. | Dursun Baran, Mustafa Aktan, Vojin G. Oklobdzija |
| 2010 | ISLPED | Energy efficient implementation of parallel CMOS multipliers with improved compressors. | Dursun Baran, Mustafa Aktan, Vojin G. Oklobdzija |
| 2005 | ARITH | Efficient Mapping of Addition Recurrence Algorithms in CMOS. | Bart R. Zeydel, Theo T. J. H. Kluter, Vojin G. Oklobdzija |
| 2005 | ICCD | Architectural Considerations for Energy Efficiency. | Hoang Q. Dao, Bart R. Zeydel, Vojin G. Oklobdzija |
| 2005 | ICCD | Low- and Ultra Low-Power Arithmetic Units: Design and Comparison. | Milena Vratonjic, Bart R. Zeydel, Vojin G. Oklobdzija |
| 2003 | ARITH | Tutorial: Design of Power Efficient VLSI Arithmetic: Speed and Power Trade-Offs. | Vojin G. Oklobdzija, Ram Krishnamurthy |
| 2003 | ARITH | Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders. | Vojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao, Sanu Mathew, Ram Krishnamurthy |
| 2003 | ISCAS | Area-time optimal adder with relative placement generator. | Aamir A. Farooqui, Vojin G. Oklobdzija, Sadiq M. Sait |
| 2003 | ISCAS | An efficient transistor optimizer for custom circuits. | Xiao Yan Yu, Vojin G. Oklobdzija, William W. Walker |
| 2002 | ISCAS | Comparative analysis of double-edge versus single-edge triggered clocked storage elements. | Nikola Nedovic, Marko Aleksic, Vojin G. Oklobdzija |
| 2002 | ISLPED | Conditional pre-charge techniques for power-efficient dual-edge clocking. | Nikola Nedovic, Marko Aleksic, Vojin G. Oklobdzija |
| 2002 | ISLPED | Future directions in clocking multi-ghz systems. | Vojin G. Oklobdzija, Jens Spars |
| 2001 | ICCD | Timing Characterization of Dual-edge Triggered Flip-flops. | Nikola Nedovic, Marko Aleksic, Vojin G. Oklobdzija |
| 2001 | ISLPED | Analysis of clocked timing elements for dynamic voltage scaling effects over process parameter variation. | Hoang Q. Dao, Kevin J. Nowka, Vojin G. Oklobdzija |
| 2000 | ICCD | Dynamic Flip-Flop with Improved Power. | Nikola Nedovic, Vojin G. Oklobdzija |
| 1998 | ICCD | Comparative analysis of latches and flip-flops for high-performance systems. | Vladimir Stojanovic, Vojin G. Oklobdzija, Raminder Singh Bajwa |
| 1998 | ISLPED | A unified approach in the analysis of latches and flip-flops for low-power systems. | Vladimir Stojanovic, Vojin G. Oklobdzija, Raminder Singh Bajwa |
| 1997 | ARITH | Implementing Multiply-Accumulate Operation in Multiplication Time. | Paul F. Stelling, Vojin G. Oklobdzija |
| 1997 | ISLPED | Clocked CMOS adiabatic logic with integrated single-phase power-clock supply: experimental results. | Dragan Maksimovic, Vojin G. Oklobdzija, Borivoje Nikolic, K. Wayne Current |
| 1995 | ARITH | Design Strategies for Optimal Multiplier Circuits. | Charles U. Martel, Vojin G. Oklobdzija, R. Ravi, Paul F. Stelling |
| 1994 | ICCD | Determination of Optimal Sizes for a First and Second Level SRAM-DRAM On-Chip Cache Combination. | Rupinder Hundal, Vojin G. Oklobdzija |
| 1991 | ARITH | Delay optimization of carry-skip adders and block carry-lookahead adders. | Pak K. Chan, Martine D. F. Schlag, Clark D. Thomborson, Vojin G. Oklobdzija |
| 1988 | ICASSP | VLSI architecture of a real-time Wigner distribution processor for acoustic signals. | N. M. Marinovic, Vojin G. Oklobdzija, L. Roytman |
| 1985 | ARITH | Some optimal schemes for ALU implementation in VLSI technology. | Vojin G. Oklobdzija, Earl R. Barnes |
| 1984 | ITC | Test Generation for FET Switching Circuits. | J. Paul Roth, Vojin G. Oklobdzija, John F. Beetem |