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Vyacheslav Rovner

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

4

Venues

2

Active years

2003–2009

Best venue rank

A*

Where they publish

Papers

4 indexed papers, newest first.

YearVenueTitleAuthors
2009DACCreating an affordable 22nm node using design-lithography co-optimization.Andrzej J. Strojwas, Tejas Jhaveri, Vyacheslav Rovner, Lawrence T. Pileggi
2005DACDesign methodology for IC manufacturability based on regular logic-bricks.V. Kheterpal, Vyacheslav Rovner, T. G. Hersan, D. Motiani, Y. Takegawa, Andrzej J. Strojwas, Lawrence T. Pileggi
2004ITCBenchmarking Diagnosis Algorithms With a Diverse Set of IC Deformations.Thomas J. Vogels, Thomas Zanon, Rao Desineni, R. D. (Shawn) Blanton, Wojciech Maly, Jason G. Brown, Jeffrey E. Nelson, Y. Fei, X. Huang, Padmini Gopalakrishnan, Mahim Mishra, Vyacheslav Rovner, S. Tiwary
2003DACExploring regular fabrics to optimize the performance-cost trade-off.Lawrence T. Pileggi, Herman Schmit, Andrzej J. Strojwas, Padmini Gopalakrishnan, V. Kheterpal, Aneesh Koorapaty, Chetan Patel, Vyacheslav Rovner, Kim Yaw Tong