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Wei-Chung Hsu

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

52

Venues

17

Active years

1986–2026

Best venue rank

A*

Where they publish

Papers

52 indexed papers, newest first.

YearVenueTitleAuthors
2026ICSHoloGraph: Bridging the Throughput Gap in Heterogeneous Graph Pattern Matching via Workload-Aware Steering.Haotian Ma, Wei-Chung Hsu, Yeh-Ching Chung
2023ICCDMultiFuse: Efficient Cross Layer Fusion for DNN Accelerators with Multi-level Memory Hierarchy.Chia-Wei Chang, Jing-Jia Liou, Chih-Tsun Huang, Wei-Chung Hsu, Juin-Ming Lu
2022ICPADSAccelerating Convolutional Neural Networks via Inter-operator Scheduling.Yi You, Pangfeng Liu, Ding-Yong Hong, Jan-Jan Wu, Wei-Chung Hsu
2019CGOTranslating Traditional SIMD Instructions to Vector Length Agnostic Architectures.Sheng-Yu Fu, Wei-Chung Hsu
2019ICPPExploiting Vector Processing in Dynamic Binary Translation.Chih-Min Lin, Sheng-Yu Fu, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, Wei-Chung Hsu
2018CASESExploiting SIMD capability in an ARMv7-to-ARMv8 dynamic binary translator.Sheng-Yu Fu, Chih-Min Lin, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, Wei-Chung Hsu
2017VEEReRanz: A Light-Weight Virtual Machine to Mitigate Memory Disclosure Attacks.Zhe Wang, Chenggang Wu, Jianjun Li, Yuanming Lai, Xiangyu Zhang, Wei-Chung Hsu, Yueqiang Cheng
2016ICPADSExploiting Longer SIMD Lanes in Dynamic Binary Translation.Ding-Yong Hong, Sheng-Yu Fu, Yu-Ping Liu, Jan-Jan Wu, Wei-Chung Hsu
2016VEEBuilding a KVM-based Hypervisor for a Heterogeneous System Architecture Compliant System.Yu-Ju Huang, Hsuan-Heng Wu, Yeh-Ching Chung, Wei-Chung Hsu
2015DATEImproving SIMD code generation in QEMU.Sheng-Yu Fu, Jan-Jan Wu, Wei-Chung Hsu
2015ICPADSSIMD Code Translation in an Enhanced HQEMU.Sheng-Yu Fu, Ding-Yong Hong, Jan-Jan Wu, Pangfeng Liu, Wei-Chung Hsu
2015VEEHSPT: Practical Implementation and Efficient Management of Embedded Shadow Page Tables for Cross-ISA System Virtual Machines.Zhe Wang, Jianjun Li, Chenggang Wu, Dongyan Yang, Zhenjiang Wang, Wei-Chung Hsu, Bin Li, Yong Guan
2014CGODynamic and Adaptive Calling Context Encoding.Jianjun Li, Zhenjiang Wang, Chenggang Wu, Wei-Chung Hsu, Di Xu
2014ICSAuthor retrospective for code scheduling and register allocation in large basic blocks.James R. Goodman, Wei-Chung Hsu
2014NPCAn Adaptive Heterogeneous Runtime for Irregular Applications in the Case of Ray-Tracing (Extended Abstract).Chih-Chen Kao, Wei-Chung Hsu
2014VEEEfficient memory virtualization for Cross-ISA system mode emulation.Chao-Rui Chang, Jan-Jan Wu, Wei-Chung Hsu, Pangfeng Liu, Pen-Chung Yew
2014VEEDBILL: an efficient and retargetable dynamic binary instrumentation framework using llvm backend.Yi-Hong Lyu, Ding-Yong Hong, Tai-Yi Wu, Jan-Jan Wu, Wei-Chung Hsu, Pangfeng Liu, Pen-Chung Yew
2013CASESEffective code discovery for ARM/Thumb mixed ISA binaries in a static binary translator.Jiunn-Yeu Chen, Bor-Yeh Shen, Quan-Huei Ou, Wuu Yang, Wei-Chung Hsu
2013VEEImproving dynamic binary optimization through early-exit guided code region formation.Chun-Chen Hsu, Pangfeng Liu, Jan-Jan Wu, Pen-Chung Yew, Ding-Yong Hong, Wei-Chung Hsu, Chien-Min Wang
2012CASESA hybrid just-in-time compiler for android: comparing JIT types and the result of cooperation.Guillermo A. Prez, Chung-Min Kao, Yeh-Ching Chung, Wei-Chung Hsu
2012CASESLLBT: an LLVM-based static binary translator.Bor-Yeh Shen, Jiunn-Yeu Chen, Wei-Chung Hsu, Wuu Yang
2012CGOHQEMU: a multi-threaded and retargetable dynamic binary translator on multicores.Ding-Yong Hong, Chun-Chen Hsu, Pen-Chung Yew, Jan-Jan Wu, Wei-Chung Hsu, Pangfeng Liu, Chien-Min Wang, Yeh-Ching Chung
2011CASESA method-based ahead-of-time compiler for android applications.Chih-Sheng Wang, Guillermo A. Prez, Yeh-Ching Chung, Wei-Chung Hsu, Wei-Kuan Shih, Hong-Rong Hsu
2011CGODynamic register promotion of stack variables.Jianjun Li, Chenggang Wu, Wei-Chung Hsu
2011ICPADSPQEMU: A Parallel System Emulator Based on QEMU.Jiun-Hung Ding, Po-Chun Chang, Wei-Chung Hsu, Yeh-Ching Chung
2011ICPPLnQ: Building High Performance Dynamic Binary Translators with Existing Compiler Backends.Chun-Chen Hsu, Pangfeng Liu, Chien-Min Wang, Jan-Jan Wu, Ding-Yong Hong, Pen-Chung Yew, Wei-Chung Hsu
2009CGOAn Evaluation of Misaligned Data Access Handling Mechanisms in Dynamic Binary Translation Systems.Jianjun Li, Chenggang Wu, Wei-Chung Hsu
2009ISCADynamic performance tuning for speculative threads.Yangchun Luo, Venkatesan Packirisamy, Wei-Chung Hsu, Antonia Zhai, Nikhil Mungre, Ankit Tarkas
2009ISPASSExploring speculative parallelism in SPEC2006.Venkatesan Packirisamy, Antonia Zhai, Wei-Chung Hsu, Pen-Chung Yew, Tin-Fook Ngai
2008SMCSufficient sunlight supply for home care using local closed-loop shutter control system.Chao-Hung Chen, Hsiung-Cheng Lin, Ying-Chu Liu, Wei-Chung Hsu, Shin-Ming Chang
2007ICPPCOBRA: An Adaptive Runtime Binary Optimization Framework for Multithreaded Applications.Jinpyo Kim, Wei-Chung Hsu, Pen-Chung Yew
2006CGORegion Monitoring for Local Phase Detection in Dynamic Optimization Systems.Abhinav Das, Jiwei Lu, Wei-Chung Hsu
2006HiPCSupporting Speculative Multithreading on Simultaneous Multithreaded Processors.Venkatesan Packirisamy, Shengyue Wang, Antonia Zhai, Wei-Chung Hsu, Pen-Chung Yew
2005CGOA General Compiler Framework for Speculative Optimizations Using Data Speculative Code Motion.Xiaoru Dai, Antonia Zhai, Wei-Chung Hsu, Pen-Chung Yew
2005CGOPerformance of Runtime Optimization on BLAST.Abhinav Das, Jiwei Lu, Howard Chen, Jinpyo Kim, Pen-Chung Yew, Wei-Chung Hsu, Dong-yuan Chen
2005MICRODynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor.Jiwei Lu, Abhinav Das, Wei-Chung Hsu, Khoa Nguyen, Santosh G. Abraham
2004CCData Dependence Profiling for Speculative Optimizations.Tong Chen, Jin Lin, Xiaoru Dai, Wei-Chung Hsu, Pen-Chung Yew
2003CGODynamic Trace Selection Using Performance Monitoring Hardware Sampling.Howard Chen, Wei-Chung Hsu, Dong-yuan Chen
2003CGOSpeculative Register Promotion Using Advanced Load Address Table (ALAT).Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew
2003MICROThe Performance of Runtime Data Cache Prefetching in a Dynamic Optimization System.Jiwei Lu, Howard Chen, Rao Fu, Wei-Chung Hsu, Bobbie Othmer, Pen-Chung Yew, Dong-yuan Chen
2003PLDIA compiler framework for speculative analysis and optimizations.Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai, Sun Chan
1997ISCAData Prefetching on the HP PA-8000.Vatsa Santhanam, Edward H. Gornish, Wei-Chung Hsu
1996MICROInstruction Scheduling for the HP PA-8000.David A. Dunn, Wei-Chung Hsu
1993ISCAPerformance of Cached DRAM Organizations in Vector Supercomputers.Wei-Chung Hsu, James E. Smith
1992MICROOn the instruction-level characteristics of scalar code in highly-vectorized scientific applications.Sriram Vajapeyam, Wei-Chung Hsu
1992SCPrefetching in Supercomputer Instruction Caches.James E. Smith, Wei-Chung Hsu
1991ISCAAn Empirical Study of the CRAY Y-MP Processor Using the Perfect Club Benchmarks.Sriram Vajapeyam, Gurindar S. Sohi, Wei-Chung Hsu
1990ICCDExploitation of operation-level parallelism in a processor of the CRAY X-MP.Sriram Vajapeyam, Gurindar S. Sohi, Wei-Chung Hsu
1990SCFuture general purpose supercomputer architectures.James E. Smith, Wei-Chung Hsu, Christopher C. Hsiung
1988ICSCode scheduling and register allocation in large basic blocks.James R. Goodman, Wei-Chung Hsu
1987ISCAWISQ: A Restartable Architecture Using Queues.Andrew R. Pleszkun, James R. Goodman, Wei-Chung Hsu, R. T. Joersz, George E. Bier, Philip J. Woest, P. B. Schechter
1986ISCAOn the Use of Registers vs. Cache to Minimize Memory Traffic.James R. Goodman, Wei-Chung Hsu