| 2026 | SANER | HieraTest: Hierarchical Dependency-Driven Framework with Multi-Strategy Repair for LLM-Based Unit Test Generation. | Weichang Liu, Junwei Zhang, Xiaochun Zhu, Bo Zhou |
| 2013 | ICCAD | CD-ECC: content-dependent error correction codes for combating asymmetric nonvolatile memory operation errors. | Wujie Wen, Mengjie Mao, Xiaochun Zhu, Seung-Hyuk Kang, Danghui Wang, Yiran Chen |
| 2011 | ICCAD | Device-architecture co-optimization of STT-RAM based memory for low power embedded systems. | Cong Xu, Dimin Niu, Xiaochun Zhu, Seung-Hyuk Kang, Matt Nowak, Yuan Xie |
| 2011 | MICRO | Multi retention level STT-RAM cache designs with a dynamic refresh scheme. | Zhenyu Sun, Xiuyuan Bi, Hai (Helen) Li, Weng-Fai Wong, Zhong-Liang Ong, Xiaochun Zhu, Wenqing Wu |
| 2009 | ESEM | Simulation of the defect removal process with queuing theory. | Fan Wang, Xiaohu Yang, Xiaochun Zhu, Lu Chen |
| 2009 | ESEM | Software testing sizing in incremental development: A case study. | Xiaochun Zhu, Bo Zhou, Lu Chen |
| 2008 | APSEC | Early Estimate the Size of Test Suites from Use Cases. | Yi Qu, Bo Zhou, Xiaochun Zhu |
| 2008 | CW | Estimate Test Execution Effort at an Early Stage: An Empirical Study. | Xiaochun Zhu, Bo Zhou, Fan Wang, Yi Qu, Lu Chen |