| 2024 | AAAI | DeepSpeed Data Efficiency: Improving Deep Learning Model Quality and Training Efficiency via Efficient Data Sampling and Routing. | Conglong Li, Zhewei Yao, Xiaoxia Wu, Minjia Zhang, Connor Holmes, Cheng Li, Yuxiong He |
| 2024 | AAAI | Exploring Post-training Quantization in LLMs from Comprehensive Study to Low Rank Compensation. | Zhewei Yao, Xiaoxia Wu, Cheng Li, Stephen Youn, Yuxiong He |
| 2024 | ICLR | ZeRO++: Extremely Efficient Collective Communication for Large Model Training. | Guanhua Wang, Heyang Qin, Sam Ade Jacobs, Xiaoxia Wu, Connor Holmes, Zhewei Yao, Samyam Rajbhandari, Olatunji Ruwase, Feng Yan, Lei Yang, Yuxiong He |
| 2024 | USENIX | Quant-LLM: Accelerating the Serving of Large Language Models via FP6-Centric Algorithm-System Co-Design on Modern GPUs. | Haojun Xia, Zhen Zheng, Xiaoxia Wu, Shiyang Chen, Zhewei Yao, Stephen Youn, Arash Bakhtiari, Michael Wyatt, Donglin Zhuang, Zhongzhu Zhou, Olatunji Ruwase, Yuxiong He, Shuaiwen Leon Song |
| 2023 | ICML | Understanding Int4 Quantization for Language Models: Latency Speedup, Composability, and Failure Cases. | Xiaoxia Wu, Cheng Li, Reza Yazdani Aminabadi, Zhewei Yao, Yuxiong He |
| 2022 | AAAI | AdaLoss: A Computationally-Efficient and Provably Convergent Adaptive Gradient Method. | Xiaoxia Wu, Yuege Xie, Simon Shaolei Du, Rachel A. Ward |
| 2021 | ICLR | When Do Curricula Work? | Xiaoxia Wu, Ethan Dyer, Behnam Neyshabur |
| 2020 | AISTATS | Choosing the Sample with Lowest Loss makes SGD Robust. | Vatsal Shah, Xiaoxia Wu, Sujay Sanghavi |
| 2020 | AISTATS | Linear Convergence of Adaptive Stochastic Gradient Descent. | Yuege Xie, Xiaoxia Wu, Rachel A. Ward |
| 2019 | ICML | AdaGrad stepsizes: sharp convergence over nonconvex landscapes. | Rachel A. Ward, Xiaoxia Wu, Lon Bottou |
| 2010 | DAC | Cost-driven 3D integration with interconnect layers. | Xiaoxia Wu, Guangyu Sun, Xiangyu Dong, Reetuparna Das, Yuan Xie, Chita R. Das, Jian Li |
| 2009 | DATE | Power and performance of read-write aware Hybrid Caches with non-volatile memories. | Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Yuan Xie |
| 2009 | ISCA | Hybrid cache architecture with disparate memory technologies. | Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ramakrishnan Rajamony, Yuan Xie |
| 2009 | ISLPED | Exploration of 3D stacked L2 cache design for high performance and efficient thermal control. | Guangyu Sun, Xiaoxia Wu, Yuan Xie |
| 2008 | ASPDAC | Variability-driven module selection with joint design time optimization and post-silicon tuning. | Feng Wang, Xiaoxia Wu, Yuan Xie |
| 2008 | DAC | Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement. | Xiangyu Dong, Xiaoxia Wu, Guangyu Sun, Yuan Xie, Hai Li, Yiran Chen |
| 2008 | ICCD | Comparative analysis of NBTI effects on low power and high performance flip-flops. | Krishnan Ramakrishnan, Xiaoxia Wu, Narayanan Vijaykrishnan, Yuan Xie |
| 2008 | ICCD | Test-access mechanism optimization for core-based three-dimensional SOCs. | Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, Yuan Xie |
| 2008 | ITC | Test-Access Solutions for Three-Dimensional SOCs. | Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, Yuan Xie |
| 2007 | ICCAD | Variation-aware task allocation and scheduling for MPSoC. | Feng Wang, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan |
| 2007 | ICCD | Scan chain design for three-dimensional integrated circuits (3D ICs). | Xiaoxia Wu, Paul Falkenstern, Yuan Xie |
| 2006 | ICCAD | Guaranteeing performance yield in high-level synthesis. | Wei-Lun Hung, Xiaoxia Wu, Yuan Xie |