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Xin Si

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

18

Venues

8

Active years

2018–2026

Best venue rank

A*

Where they publish

Papers

18 indexed papers, newest first.

YearVenueTitleAuthors
2026DATECIM-Tuner: Balancing the Compute and Storage Capacity of SRAM-CIM Accelerator via Hardware-mapping Co-exploration.Jinwu Chen, Yuhui Shi, He Wang, Zhe Jiang, Jun Yang, Xin Si, Zhenhua Zhu
2026ISCASA Highly-Scalable and Full-Connected SOT P-Bit Ising Annealer for Combinatorial Optimization.Huanghui Wang, Haoran Du, Yantong Di, Zeying Ding, Jiongzhe Su, Jingchao Zhang, Miao Yu, Xin Si, Bo Liu, Yan Cui, Hao Cai
2025ASPDACTRIFP-DCIM: A Toggle-Rate-Immune Floating-point Digital Compute-in-Memory Design with Adaptive-Asymmetric Compute-Tree.Xing Wang, Tianhui Jiao, Shaochen Li, Yuchen Ma, Zhican Zhang, Zhichao Liu, Xi Chen, Xin Si
2025DACOutlierCIM: Outlier-Aware Digital CIM-Based LLM Accelerator with Hybrid-Strategy Quantization and Unified FP-INT Computation.Zihan Zou, Shikuang Chen, Chen Zhang, Xing Wang, Zhichao Liu, Haoran Du, Xin Si, Hao Cai, Bo Liu
2025ICCADH3D-LLM: Heterogeneous 3D Chiplet Design for LLM Inference with Dynamic Task Scheduling and Memory-Aware Orchestration.Hui Kou, Chenjie Xia, Jialin Yang, Liyi Li, Hao Cai, Xin Si, Bo Liu
2025ICCADSparCIM: A Heterogeneous CIM-Based Accelerator for Large Language Models with Contextual and Unstructured Bit Sparsity.Xingyu Xu, Yuan Song, Bo Hu, Peng Zheng, Zihan Zou, Xin Si, Bo Liu
2025ISCAHCong Li, Yihan Yin, Xintong Wu, Jingchen Zhu, Zhutianya Gao, Dimin Niu, Qiang Wu, Xin Si, Yuan Xie, Chen Zhang, Guangyu Sun
2025ISCAAIM: Software and Hardware Co-design for Architecture-level IR-drop Mitigation in High-performance PIM.Yuanpeng Zhang, Xing Hu, Xi Chen, Zhihang Yuan, Cong Li, Jingchen Zhu, Zhao Wang, Chenguang Zhang, Xin Si, Wei Gao, Qiang Wu, Runsheng Wang, Guangyu Sun
2025ISCASVariation-Adaptive Negative Bitline and Skip Bitline Pre-charge Scheme for Low-Power SRAM.Lishuo Deng, Changwei Yan, Yiran Zhang, Xin Si, Weiwei Shan
2025ISCASModeling of Less-Significant Group Quantization for Hybrid CIM Architecture.Shaochen Li, Xi Chen, Lingyi Kong, He Wang, Xing Wang, Yi Yang, Xin Si
2024DACFDCA: Fine-grained Digital-CIM based CNN Accelerator with Hybrid Quantization and Weight-Stationary Dataflow.Bo Liu, Qingwen Wei, Yang Zhang, Xingyu Xu, Zihan Zou, Xinxiang Huang, Xin Si, Hao Cai
2024ISCASComplementary Series-connected STT-MTJ for Time-based Computing-in-Memory.Rong Zhou, Bo Liu, Xin Si, Hao Cai
2024RTSSROTA-I/O: Hardware/Algorithm Co-design for Real-Time I/O Control with Improved Timing Accuracy and Robustness.Zhe Jiang, Shuai Zhao, Ran Wei, Xin Si, Gang Chen, Nan Guan
2022HPCAEnabling High-Quality Uncertainty Quantification in a PIM Designed for Bayesian Neural Network.Xingchen Li, Bingzhe Wu, Guangyu Sun, Zhe Zhang, Zhihang Yuan, Runsheng Wang, Ru Huang, Dimin Niu, Hongzhong Zheng, Zhichao Lu, Liang Zhao, Meng-Fan Marvin Chang, Tianchan Guan, Xin Si
2022ISCASShareFloat CIM: A Compute-In-Memory Architecture with Floating-Point Multiply-and-Accumulate Operations.An Guo, Yongliang Zhou, Bo Wang, Tianzhu Xiong, Chen Xue, Yufei Wang, Xin Si, Jun Yang
2022ISCASSNNIM: A 10T-SRAM based Spiking-Neural-Network-In-Memory architecture with capacitance computation.Bo Wang, Chen Xue, Han Liu, Xiang Li, Anran Yin, Zhongyuan Feng, Yuyao Kong, Tianzhu Xiong, Haiming Hsu, Yongliang Zhou, An Guo, Yufei Wang, Jun Yang, Xin Si
2021ISCASA 40nm 1Mb 35.6 TOPS/W MLC NOR-Flash Based Computation-in-Memory Structure for Machine Learning.Yuxin Zhang, Sitao Zeng, Zhiguo Zhu, Zhaolong Qin, Chen Wang, Jingjing Li, Sanfeng Zhang, Yajuan He, Chunmeng Dou, Xin Si, Meng-Fan Chang, Qiang Li
2018DACParallelizing SRAM arrays with customized bit-cell for binary neural networks.Rui Liu, Xiaochen Peng, Xiaoyu Sun, Win-San Khwa, Xin Si, Jia-Jing Chen, Jia-Fang Li, Meng-Fan Chang, Shimeng Yu