Skip to content

Xuewei Ding

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

1

Venues

1

Active years

2025–2025

Best venue rank

C

Where they publish

Papers

1 indexed papers, newest first.

YearVenueTitleAuthors
2025ISCASA PVT-Insensitive 7-Bit Coarse-Fine Ratio-Metric Digital-to-Time Converter for Fractional-N Phase-Locked Loops in 65-nm CMOS.Shenjian Zhang, Chenming Zhang, Hao Luo, Shengtao Yi, Xuewei Ding, Zhirui Zong