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A PVT-Insensitive 7-Bit Coarse-Fine Ratio-Metric Digital-to-Time Converter for Fractional-N Phase-Locked Loops in 65-nm CMOS.

Shenjian Zhang, Chenming Zhang, Hao Luo, Shengtao Yi, Xuewei Ding, Zhirui Zong

VenueCISCAS
Year2025
ProceedingsISCAS

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