A PVT-Insensitive 7-Bit Coarse-Fine Ratio-Metric Digital-to-Time Converter for Fractional-N Phase-Locked Loops in 65-nm CMOS.
Shenjian Zhang, Chenming Zhang, Hao Luo, Shengtao Yi, Xuewei Ding, Zhirui Zong
Browse the full ISCAS paper archive.
Shenjian Zhang, Chenming Zhang, Hao Luo, Shengtao Yi, Xuewei Ding, Zhirui Zong
Browse the full ISCAS paper archive.