Yoshichika Fujioka
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
1993–2005
Best venue rank
A*
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2005 | ISCAS | VLSI architecture based on packet data transfer scheme and its application. | Yuya Homma, Michitaka Kameyama, Yoshichika Fujioka, Nobuhiro Tomabechi |
| 1993 | ICRA | 2400-MFLOPS Reconfigurable Parallel VLSI Processor for Robot Control. | Yoshichika Fujioka, Michitaka Kameyama |