| 2025 | ETS | FastGDBN: A GPU-Accelerated DNN for Identifying Good Dies in Bad Neighborhoods. | Yu-Heng Tsao, Yu-Guang Chen |
| 2025 | ICCAD | Invited Paper: 2025 ICCAD CAD Contest Problem A: Hardware Trojan Detection on Gate-Level Netlist. | Chung-Han Chou, Chih-Jen (Jacky) Hsu, Hung-Chun Chiu, Kai-Chiang Wu, Yu-Guang Chen, Zhuo Li |
| 2025 | ICCAD | COPA: A Congestion-Oriented Pin Assignment Framework for Intra-Block Physical Design Optimization. | Shu-Yi Tsai, Yu-Guang Chen, Kun-Min Chen, Sheng-Bing Ke, Chung-Hui Hsieh, Chih-Wei Lin, Mango Chia-Tso Chao |
| 2025 | ICLR | Basis Sharing: Cross-Layer Parameter Sharing for Large Language Model Compression. | Jingcun Wang, Yu-Guang Chen, Ing-Chao Lin, Bing Li, Grace Li Zhang |
| 2024 | ETS | GNN-Based INC and IVC Co-Optimization for Aging Mitigation. | Yu-Guang Chen, Hsiu-Yi Yang, Ing-Chao Lin |
| 2024 | ISCAS | Enhancing Stability in CRPs: A Novel Parallel Scan-Chain PUF Design Considering Aging Effects. | Yu-Guang Chen, Tzong-Ying Lee, Yi-Ting Lin |
| 2023 | ASPDAC | An On-Line Aging Detection and Tolerance Framework for Improving Reliability of STT-MRAMs. | Yu-Guang Chen, Po-Yeh Huang, Jin-Fu Li |
| 2023 | ICCAD | Invited Paper: Overview of 2023 CAD Contest at ICCAD. | Takashi Sato, Chun-Yao Wang, Yu-Guang Chen, Tsung-Wei Huang |
| 2022 | ICCAD | Overview of 2022 CAD Contest at ICCAD. | Yu-Guang Chen, Chun-Yao Wang, Tsung-Wei Huang, Takashi Sato |
| 2021 | ICCAD | Overview of 2021 CAD Contest at ICCAD. | Tsung-Wei Huang, Yu-Guang Chen, Chun-Yao Wang, Takashi Sato |
| 2020 | ICCAD | Power Distribution Network Generation for Optimizing IR-Drop Aware Timing. | Wen-Hsiang Chang, Li-Yi Lin, Yu-Guang Chen, Mango C.-T. Chao |
| 2019 | ICCAD | ROAD: Improving Reliability of Multi-core System via Asymmetric Aging. | Yu-Guang Chen, Ing-Chao Lin, Jian-Ting Ke |
| 2018 | DATE | An efficient NBTI-aware wake-up strategy for power-gated designs. | Kun-Wei Chiu, Yu-Guang Chen, Ing-Chao Lin |
| 2017 | ASPDAC | Pattern based runtime voltage emergency prediction: An instruction-aware block sparse compressed sensing approach. | Yu-Guang Chen, Michihiro Shintani, Takashi Sato, Yiyu Shi, Shih-Chieh Chang |
| 2016 | ASPDAC | A novel low-cost dynamic logic reconfigurable structure strategy for low power optimization. | Yu-Guang Chen, Wan-Yu Wen, Yun-Ting Wang, You-Luen Lee, Shih-Chieh Chang |
| 2014 | DAC | Critical Path Monitor Enabled Dynamic Voltage Scaling for Graceful Degradation in Sub-Threshold Designs. | Yu-Guang Chen, Tao Wang, Kuan-Yu Lai, Wan-Yu Wen, Yiyu Shi, Shih-Chieh Chang |
| 2014 | DATE | Yield and timing constrained spare TSV assignment for three-dimensional integrated circuits. | Yu-Guang Chen, Kuan-Yu Lai, Ming-Chao Lee, Yiyu Shi, Wing-Kai Hon, Shih-Chieh Chang |
| 2012 | ICCAD | Efficient multiple-bit retention register assignment for power gated design: Concept and algorithms. | Yu-Guang Chen, Yiyu Shi, Kuan-Yu Lai, Hui Geng, Shih-Chieh Chang |
| 2011 | ASPDAC | NBTI-aware power gating design. | Ming-Chao Lee, Yu-Guang Chen, Ding-Kei Huang, Shih-Chieh Chang |
| 2006 | IWCMC | Tracers placement for IP traceback against DDoS attacks. | Chun-Hsin Wang, Chang-Wu Yu, Chiu-Kuo Liang, Kun-Ming Yu, Wen Ouyang, Ching-Hsien Hsu, Yu-Guang Chen |