| 2025 | IWQoS | 6CNIS: An Efficient IPv6 Cellular Network Identification System. | Ling Hu, Yu Pang, Bingnan Hou, Zhiping Cai |
| 2025 | IWQoS | Grey Rhino Warning: IPv6 is Becoming Fertile Ground for Reflection Amplification Attacks. | Ling Hu, Tao Yang, Yu Pang, Bingnan Hou, Zhiping Cai, Bo Yu |
| 2022 | DASC | Wearable IMU Based Gait Quality Quantitative Evaluation Method. | Jiahui Tang, Yu Pang, Hao Wang, Ye Li, Fangmin Sun |
| 2022 | DASC | A Deep Reinforcement Learning Based Approach for Intelligent Reconfigurable Surface Elements Selection. | Shiming Zan, Yu Pang, Raffaele Gravina, Enling Cao, Ye Li, Weilin Zang |
| 2021 | IWCMC | Pedestrian Stride-Length Estimation Algorithm Based on DTW Motion Mode Recognition. | Guoquan Li, Kai Yao, Enxu Geng, Jinzhao Lin, Yu Pang |
| 2019 | ICPP | A Tale of Two (Flow) Tables: Demystifying Rule Caching in OpenFlow Switches. | Rui Li, Yu Pang, Jin Zhao, Xin Wang |
| 2018 | ISCAS | An ASIC Implementation of Security Scheme for Body Area Networks. | Junchao Wang, Kaining Han, Anastasios Alexandridis, Zeljko Zilic, Yu Pang, Jinzhao Lin |
| 2016 | IECON | Ship shaft generation control system based on BDFG. | Yu Pang, Honda Liu, Yusen Wang |
| 2016 | MICCAI | Structure-Aware Rank-1 Tensor Approximation for Curvilinear Structure Tracking Using Learned Hierarchical Features. | Peng Chu, Yu Pang, Erkang Cheng, Ying J. Zhu, Yefeng Zheng, Haibin Ling |
| 2015 | FUSION | Multiway histogram intersection for multi-target tracking. | Yu Pang, Xinchu Shi, Bin Jia, Erik Blasch, Carolyn Sheaff, Khanh Pham, Genshe Chen, Haibin Ling |
| 2014 | CVPR | Curvilinear Structure Tracking by Low Rank Tensor Approximation with Model Propagation. | Erkang Cheng, Yu Pang, Ying J. Zhu, Jingyi Yu, Haibin Ling |
| 2013 | ICCV | Finding the Best from the Second Bests - Inhibiting Subjective Bias in Evaluation of Visual Tracking Algorithms. | Yu Pang, Haibin Ling |
| 2011 | ASPDAC | An efficient hybrid engine to perform range analysis and allocate integer bit-widths for arithmetic circuits. | Yu Pang, Katarzyna Radecka, Zeljko Zilic |
| 2011 | ICCD | Positive Davio-based synthesis algorithm for reversible logic. | Yu Pang, Shaoquan Wang, Zhilong He, Jinzhao Lin, Sayeeda Sultana, Katarzyna Radecka |
| 2011 | ICCD | A study on relating redundancy removal in classical circuits to reversible mapping. | Sayeeda Sultana, Katarzyna Radecka, Yu Pang |
| 2011 | ISCAS | A novel method of synthesizing reversible logic. | Yu Pang, Jinzhao Lin, Sayeeda Sultana, Katarzyna Radecka |
| 2011 | ISCAS | An efficient algorithm of performing range analysis for fixed-point arithmetic circuits based on SAT checking. | Yu Pang, Katarzyna Radecka |
| 2008 | DAC | Optimizing imprecise fixed-point arithmetic circuits specified by Taylor Series through arithmetic transform. | Yu Pang, Katarzyna Radecka |