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Yuan-Hsiang Kuo

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

1

Venues

1

Active years

2013–2013

Best venue rank

Multiconference

Where they publish

Papers

1 indexed papers, newest first.

YearVenueTitleAuthors
2013ICASSPParallel architecture and hardware implementation of pre-processor and post-processor for sequence assembly.Yuan-Hsiang Kuo, Chun-Shen Liu, Yu-Cheng Li, Yi-Chang Lu