Yunseong Jo
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2025–2025
Best venue rank
B
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ASPDAC | A 500-MS/s 8-bit SAR ADC Generated from an Automated Layout Generation Framework in 14-nm FinFET Technology. | Yunseong Jo, Taeseung Kang, Jeonghyu Yang, Jaeduk Han |