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Yuran Qiao

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

5

Active years

2014–2018

Best venue rank

A

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2018FPGATowards a Uniform Template-based Architecture for Accelerating 2D and 3D CNNs on FPGA.Junzhong Shen, You Huang, Zelong Wang, Yuran Qiao, Mei Wen, Chunyuan Zhang
2018ISCASTowards a Multi-array Architecture for Accelerating Large-scale Matrix Multiplication on FPGAs.Junzhong Shen, Yuran Qiao, You Huang, Mei Wen, Chunyuan Zhang
2017NPCOptimizing OpenCL Implementation of Deep Convolutional Neural Network on FPGA.Yuran Qiao, Junzhong Shen, Dafei Huang, Qianming Yang, Mei Wen, Chunyuan Zhang
2015ICA3PPUnified Virtual Memory Support for Deep CNN Accelerator on SoC FPGA.Tao Xiao, Yuran Qiao, Junzhong Shen, Qianming Yang, Mei Wen
2014EuroParAutomated Transformation of GPU-Specific OpenCL Kernels Targeting Performance Portability on Multi-Core/Many-Core CPUs.Dafei Huang, Mei Wen, Changqing Xun, Dong Chen, Xing Cai, Yuran Qiao, Nan Wu, Chunyuan Zhang