| 2025 | FCCM | NoH: NoC Compilation in High-Level Synthesis. | Huifeng Ke, Sihao Liu, Licheng Guo, Zifan He, Linghao Song, Suhail Basalama, Yuze Chi, Tony Nowatzki, Jason Cong |
| 2025 | ICCAD | Automated Design Space Exploration in High-Level Physical Synthesis. | Linfeng Du, Jiawei Liang, Jason Lau, Yuze Chi, Yutong Xie, Chunyou Su, Afzal Ahmad, Zifan He, Jake Ke, Jinming Ge, Jason Cong, Wei Zhang, Licheng Guo |
| 2024 | ASPLOS | TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs. | Neha Prakriya, Yuze Chi, Suhail Basalama, Linghao Song, Jason Cong |
| 2024 | ICCAD | RapidStream IR: Infrastructure for FPGA High-Level Physical Synthesis. | Jason Lau, Yuanlong Xiao, Yutong Xie, Yuze Chi, Linghao Song, Shaojie Xiang, Michael Lo, Zhiru Zhang, Jason Cong, Licheng Guo |
| 2023 | FCCM | PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs. | Moazin Khatti, Xingyu Tian, Yuze Chi, Licheng Guo, Jason Cong, Zhenman Fang |
| 2023 | FPGA | Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver. | Linghao Song, Licheng Guo, Suhail Basalama, Yuze Chi, Robert F. Lucas, Jason Cong |
| 2022 | DAC | Serpens: a high bandwidth memory based accelerator for general-purpose sparse matrix-vector multiplication. | Linghao Song, Yuze Chi, Licheng Guo, Jason Cong |
| 2022 | FPGA | Accelerating SSSP for Power-Law Graphs. | Yuze Chi, Licheng Guo, Jason Cong |
| 2022 | FPGA | RapidStream: Parallel Physical Implementation of FPGA HLS Designs. | Licheng Guo, Pongstorn Maidee, Yun Zhou, Chris Lavin, Jie Wang, Yuze Chi, Weikang Qiao, Alireza Kaviani, Zhiru Zhang, Jason Cong |
| 2022 | FPGA | SPA-GCN: Efficient and Flexible GCN Accelerator with Application for Graph Similarity Computation. | Atefeh Sohrabizadeh, Yuze Chi, Jason Cong |
| 2022 | FPGA | Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication. | Linghao Song, Yuze Chi, Atefeh Sohrabizadeh, Young-kyu Choi, Jason Lau, Jason Cong |
| 2022 | ICASSP | PYXIS: An Open-Source Performance Dataset Of Sparse Accelerators. | Linghao Song, Yuze Chi, Jason Cong |
| 2021 | FCCM | Extending High-Level Synthesis for Task-Parallel Programs. | Yuze Chi, Licheng Guo, Jason Lau, Young-kyu Choi, Jie Wang, Jason Cong |
| 2021 | FPGA | Extending High-Level Synthesis for Task-Parallel Programs. | Yuze Chi, Licheng Guo, Young-kyu Choi, Jie Wang, Jason Cong |
| 2021 | FPGA | HBM Connect: High-Performance HLS Interconnect for FPGA HBM. | Young-kyu Choi, Yuze Chi, Weikang Qiao, Nikola Samardzic, Jason Cong |
| 2021 | FPGA | AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs. | Licheng Guo, Yuze Chi, Jie Wang, Jason Lau, Weikang Qiao, Ecenur Ustun, Zhiru Zhang, Jason Cong |
| 2020 | DAC | Exploiting Computation Reuse for Stencil Accelerators. | Yuze Chi, Jason Cong |
| 2020 | DAC | Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency. | Licheng Guo, Jason Lau, Yuze Chi, Jie Wang, Cody Hao Yu, Zhe Chen, Zhiru Zhang, Jason Cong |
| 2020 | FPGA | Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency. | Licheng Guo, Jason Lau, Yuze Chi, Jie Wang, Cody Hao Yu, Zhe Chen, Zhiru Zhang, Jason Cong |
| 2020 | FPGA | HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration. | Jiajie Li, Yuze Chi, Jason Cong |
| 2019 | FPGA | Rapid Cycle-Accurate Simulator for High-Level Synthesis. | Yuze Chi, Young-kyu Choi, Jason Cong, Jie Wang |
| 2019 | FPGA | HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing. | Yi-Hsiang Lai, Yuze Chi, Yuwei Hu, Jie Wang, Cody Hao Yu, Yuan Zhou, Jason Cong, Zhiru Zhang |
| 2018 | FPGA | An Optimal Microarchitecture for Stencil Computation with Data Reuse and Fine-Grained Parallelism: (Abstract Only). | Yuze Chi, Peipei Zhou, Jason Cong |
| 2018 | ICCAD | SODA: stencil with optimized dataflow architecture. | Yuze Chi, Jason Cong, Peng Wei, Peipei Zhou |
| 2017 | FPGA | ForeGraph: Exploring Large-scale Graph Processing on Multi-FPGA Architecture. | Guohao Dai, Tianhao Huang, Yuze Chi, Ningyi Xu, Yu Wang, Huazhong Yang |
| 2016 | FPGA | FPGP: Graph Processing Framework on FPGA A Case Study of Breadth-First Search. | Guohao Dai, Yuze Chi, Yu Wang, Huazhong Yang |
| 2016 | ICDE | NXgraph: An efficient graph processing system on a single machine. | Yuze Chi, Guohao Dai, Yu Wang, Guangyu Sun, Guoliang Li, Huazhong Yang |