Zhanyuan Jiang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2006–2008
Best venue rank
A*
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | DAC | Circuit-wise buffer insertion and gate sizing algorithm with scalability. | Zhanyuan Jiang, Weiping Shi |
| 2007 | DAC | A New Twisted Differential Line Structure in Global Bus Design. | Zhanyuan Jiang, Shiyan Hu, Weiping Shi |
| 2006 | ICCAD | A new RLC buffer insertion algorithm. | Zhanyuan Jiang, Shiyan Hu, Jiang Hu, Zhuo Li, Weiping Shi |