| 2021 | ICCD | POMI: Polling-Based Memory Interface for Hybrid Memory System. | Trung Le, Zhao Zhang, Zhichun Zhu |
| 2018 | DATE | WALL: A writeback-aware LLC management for PCM-based main memory systems. | Bahareh Pourshirazi, Majed Valad Beigi, Zhichun Zhu, Gokhan Memik |
| 2018 | ICPP | CAMPS: Conflict-Aware Memory-Side Prefetching Scheme for Hybrid Memory Cube. | Muhammad M. Rafique, Zhichun Zhu |
| 2013 | ICS | Conservative row activation to improve memory power efficiency. | Kun Fang, Zhichun Zhu |
| 2010 | ICPP | Heterogeneous Mini-rank: Adaptive, Power-Efficient Memory Architecture. | Kun Fang, Hongzhong Zheng, Zhichun Zhu |
| 2009 | ISCA | Decoupled DIMM: building high-bandwidth memory system using low-speed DRAM devices. | Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu |
| 2008 | ICPP | Memory Access Scheduling Schemes for Systems with Multi-Core Processors. | Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu |
| 2008 | MICRO | Mini-rank: Adaptive DRAM architecture for improving memory power efficiency. | Hongzhong Zheng, Jiang Lin, Zhao Zhang, Eugene Gorbatov, Howard David, Zhichun Zhu |
| 2008 | SIGMETRICS | Software thermal management of dram memory for multicore systems. | Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Eugene Gorbatov, Howard David, Zhao Zhang |
| 2007 | ISCA | Thermal modeling and management of DRAM memory systems. | Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Howard David, Zhao Zhang |
| 2007 | ISPASS | DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving. | Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang, Howard David |
| 2005 | HPCA | A Performance Comparison of DRAM Memory System Optimizations for SMT Processors. | Zhichun Zhu, Zhao Zhang |
| 2002 | HPCA | Fine-Grain Priority Scheduling on Multi-Channel Memory Systems. | Zhichun Zhu, Zhao Zhang, Xiaodong Zhang |
| 2000 | MICRO | A permutation-based page interleaving scheme to reduce row-buffer conflicts and exploit data locality. | Zhao Zhang, Zhichun Zhu, Xiaodong Zhang |