Zhiguo Ge
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
4
Active years
2005–2016
Best venue rank
A*
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | ICS | Efficient Timestamp-Based Cache Coherence Protocol for Many-Core Architectures. | Yuan Yao, Guanhua Wang, Zhiguo Ge, Tulika Mitra, Wenzhi Chen, Naxin Zhang |
| 2015 | DATE | SelectDirectory: a selective directory for cache coherence in many-core architectures. | Yuan Yao, Guanhua Wang, Zhiguo Ge, Tulika Mitra, Wenzhi Chen, Naxin Zhang |
| 2009 | DAC | A DVS-based pipelined reconfigurable instruction memory. | Zhiguo Ge, Tulika Mitra, Weng-Fai Wong |
| 2007 | DATE | DRIM: a low power dynamically reconfigurable instruction memory hierarchy for embedded systems. | Zhiguo Ge, Weng-Fai Wong, Hock-Beng Lim |
| 2005 | FPL | A Reconfigurable Instruction Memory Hierarchy for Embedded Systems. | Zhiguo Ge, Hock-Beng Lim, Weng-Fai Wong |