Zhiheng Yue
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
10
Venues
4
Active years
2022–2026
Best venue rank
A*
Where they publish
Papers
10 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | HPCA | HR-DCIM: High-Reliability Floating-Point Digital CIM Architecture With Unified Low-Cost Iterative Error Correction. | Zhen He, Yiqi Wang, Zhiheng Yue, Zihan Wu, Huiming Han, Shaojun Wei, Yang Hu, Fengbin Tu, Shouyi Yin |
| 2026 | HPCA | ReThermal: Co-Design of Thermal-Aware Static and Dynamic Scheduling for LLM Training on Liquid-Cooled Wafer-Scale Chips. | Chengran Li, Huizheng Wang, Jiaxin Liu, Jingyao Liu, Zhiheng Yue, Xia Li, Shenfei Jiang, Jinyi Deng, Yang Hu, Shouyi Yin |
| 2026 | HPCA | PADE: A Predictor-Free Sparse Attention Accelerator via Unified Execution and Stage Fusion. | Huizheng Wang, Hongbin Wang, Zichuan Wang, Zhiheng Yue, Yang Wang, Chao Li, Yang Hu, Shouyi Yin |
| 2025 | MICRO | MCBP: A Memory-Compute Efficient LLM Inference Accelerator Leveraging Bit-Slice-enabled Sparsity and Repetitiveness. | Huizheng Wang, Zichuan Wang, Zhiheng Yue, Yousheng Long, Taiquan Wei, Jianxun Yang, Yang Wang, Chao Li, Shaojun Wei, Yang Hu, Shouyi Yin |
| 2025 | MICRO | 3D-PATH: A Hierarchy LUT Processing-in-memory Accelerator with Thermal-aware Hybrid Bonding Integration. | Zhiheng Yue, Yang Wang, Chao Li, Shaojun Wei, Yang Hu, Shouyi Yin |
| 2024 | DAC | Dyn-Bitpool: A Two-sided Sparse CIM Accelerator Featuring a Balanced Workload Scheme and High CIM Macro Utilization. | Xujiang Xiang, Zhiheng Yue, Yuxuan Li, Liuxin Lv, Shaojun Wei, Yang Hu, Shouyi Yin |
| 2024 | DAC | CAP: A General Purpose Computation-in-memory with Content Addressable Processing Paradigm. | Zhiheng Yue, Shaojun Wei, Yang Hu, Shouyi Yin |
| 2024 | ISCA | Exploiting Similarity Opportunities of Emerging Vision AI Models on Hybrid Bonding Architecture. | Zhiheng Yue, Huizheng Wang, Jiahao Fang, Jinyi Deng, Guangyang Lu, Fengbin Tu, Ruiqi Guo, Yuxuan Li, Yubin Qin, Yang Wang, Chao Li, Huiming Han, Shaojun Wei, Yang Hu, Shouyi Yin |
| 2024 | MICRO | SOFA: A Compute-Memory Optimized Sparsity Accelerator via Cross-Stage Coordinated Tiling. | Huizheng Wang, Jiahao Fang, Xinru Tang, Zhiheng Yue, Jinxi Li, Yubin Qin, Sihan Guan, Qinze Yang, Yang Wang, Chao Li, Yang Hu, Shouyi Yin |
| 2022 | DAC | MC-CIM: a reconfigurable computation-in-memory for efficient stereo matching cost computation. | Zhiheng Yue, Yabing Wang, Leibo Liu, Shaojun Wei, Shouyi Yin |