Zhiyong He
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
2
Active years
2005–2022
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2022 | ACL | BiSyn-GAT+: Bi-Syntax Aware Graph Attention Network for Aspect-based Sentiment Analysis. | Shuo Liang, Wei Wei, Xian-Ling Mao, Fei Wang, Zhiyong He |
| 2007 | ISCAS | FPGA Implementation of LDPC Decoders Based on Joint Row-column Decoding Algorithm. | Zhiyong He, Sbastien Roy, Paul Fortier |
| 2006 | ISCAS | Encoder architecture with throughput over 10 Gbit/sec for quasi-cyclic LDPC codes. | Zhiyong He, Sbastien Roy, Paul Fortier |
| 2005 | ISCAS | High-speed and low-power design of parallel turbo decoder. | Zhiyong He, Sbastien Roy, Paul Fortier |